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author | Greg Bellows <greg.bellows@linaro.org> | 2014-12-15 17:09:51 -0600 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2014-12-22 23:12:28 +0000 |
commit | 61e2f3521c9ee2dc3ebab2e84329d5ebd10d8518 (patch) | |
tree | 3e354355e481622dd87076aab0435dd6ce9c59c3 /hw | |
parent | 223a72f1179dc0b56bae3b01bc3e3208ef100fcc (diff) | |
download | hqemu-61e2f3521c9ee2dc3ebab2e84329d5ebd10d8518.zip hqemu-61e2f3521c9ee2dc3ebab2e84329d5ebd10d8518.tar.gz |
target-arm: Disable EL3 on unsupported machines
Disables the CPU ARM_FEATURE_EL3 featuere on machine models that can be
configured to use Cortex-A9, Cortex-A15, and ARM1176 but don't officially
support EL3. This preserves backwards compatibility.
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1418684992-8996-15-git-send-email-greg.bellows@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/arm/exynos4210.c | 11 | ||||
-rw-r--r-- | hw/arm/highbank.c | 12 | ||||
-rw-r--r-- | hw/arm/integratorcp.c | 12 | ||||
-rw-r--r-- | hw/arm/realview.c | 12 | ||||
-rw-r--r-- | hw/arm/versatilepb.c | 12 | ||||
-rw-r--r-- | hw/arm/xilinx_zynq.c | 12 |
6 files changed, 71 insertions, 0 deletions
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 582794c..97dafca 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -152,6 +152,17 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem, Object *cpuobj = object_new(object_class_get_name(cpu_oc)); Error *err = NULL; + /* By default A9 CPUs have EL3 enabled. This board does not currently + * support EL3 so the CPU EL3 property is disabled before realization. + */ + if (object_property_find(cpuobj, "has_el3", NULL)) { + object_property_set_bool(cpuobj, false, "has_el3", &err); + if (err) { + error_report("%s", error_get_pretty(err)); + exit(1); + } + } + s->cpu[n] = ARM_CPU(cpuobj); object_property_set_int(cpuobj, EXYNOS4210_SMP_PRIVATE_BASE_ADDR, "reset-cbar", &error_abort); diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index 30f744a..f67570a 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -241,6 +241,18 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id) cpuobj = object_new(object_class_get_name(oc)); cpu = ARM_CPU(cpuobj); + /* By default A9 and A15 CPUs have EL3 enabled. This board does not + * currently support EL3 so the CPU EL3 property is disabled before + * realization. + */ + if (object_property_find(cpuobj, "has_el3", NULL)) { + object_property_set_bool(cpuobj, false, "has_el3", &err); + if (err) { + error_report("%s", error_get_pretty(err)); + exit(1); + } + } + if (object_property_find(cpuobj, "reset-cbar", NULL)) { object_property_set_int(cpuobj, MPCORE_PERIPHBASE, "reset-cbar", &error_abort); diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index f196189..8c48b68 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -493,6 +493,18 @@ static void integratorcp_init(MachineState *machine) cpuobj = object_new(object_class_get_name(cpu_oc)); + /* By default ARM1176 CPUs have EL3 enabled. This board does not + * currently support EL3 so the CPU EL3 property is disabled before + * realization. + */ + if (object_property_find(cpuobj, "has_el3", NULL)) { + object_property_set_bool(cpuobj, false, "has_el3", &err); + if (err) { + error_report("%s", error_get_pretty(err)); + exit(1); + } + } + object_property_set_bool(cpuobj, true, "realized", &err); if (err) { error_report("%s", error_get_pretty(err)); diff --git a/hw/arm/realview.c b/hw/arm/realview.c index d41ec97..66e51ef 100644 --- a/hw/arm/realview.c +++ b/hw/arm/realview.c @@ -101,6 +101,18 @@ static void realview_init(MachineState *machine, Object *cpuobj = object_new(object_class_get_name(cpu_oc)); Error *err = NULL; + /* By default A9,A15 and ARM1176 CPUs have EL3 enabled. This board + * does not currently support EL3 so the CPU EL3 property is disabled + * before realization. + */ + if (object_property_find(cpuobj, "has_el3", NULL)) { + object_property_set_bool(cpuobj, false, "has_el3", &err); + if (err) { + error_report("%s", error_get_pretty(err)); + exit(1); + } + } + if (is_pb && is_mpcore) { object_property_set_int(cpuobj, periphbase, "reset-cbar", &err); if (err) { diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index b74dc15..6c4c2e7 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -206,6 +206,18 @@ static void versatile_init(MachineState *machine, int board_id) cpuobj = object_new(object_class_get_name(cpu_oc)); + /* By default ARM1176 CPUs have EL3 enabled. This board does not + * currently support EL3 so the CPU EL3 property is disabled before + * realization. + */ + if (object_property_find(cpuobj, "has_el3", NULL)) { + object_property_set_bool(cpuobj, false, "has_el3", &err); + if (err) { + error_report("%s", error_get_pretty(err)); + exit(1); + } + } + object_property_set_bool(cpuobj, true, "realized", &err); if (err) { error_report("%s", error_get_pretty(err)); diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index b590392..06e6e24 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -126,6 +126,18 @@ static void zynq_init(MachineState *machine) cpu = ARM_CPU(object_new(object_class_get_name(cpu_oc))); + /* By default A9 CPUs have EL3 enabled. This board does not + * currently support EL3 so the CPU EL3 property is disabled before + * realization. + */ + if (object_property_find(OBJECT(cpu), "has_el3", NULL)) { + object_property_set_bool(OBJECT(cpu), false, "has_el3", &err); + if (err) { + error_report("%s", error_get_pretty(err)); + exit(1); + } + } + object_property_set_int(OBJECT(cpu), ZYNQ_BOARD_MIDR, "midr", &err); if (err) { error_report("%s", error_get_pretty(err)); |