summaryrefslogtreecommitdiffstats
path: root/hw
diff options
context:
space:
mode:
authorAlistair Francis <alistair.francis@xilinx.com>2016-01-21 14:15:03 +0000
committerTimothy Pearson <tpearson@raptorengineering.com>2019-11-29 19:28:25 -0600
commit575a628b384b38008327c8e89d4c79482331e472 (patch)
tree425aedd3a5b8f1efe55af9391bc114c61af6a282 /hw
parentb260ab11507e77c40fab8494646b4fc197f25167 (diff)
downloadhqemu-575a628b384b38008327c8e89d4c79482331e472.zip
hqemu-575a628b384b38008327c8e89d4c79482331e472.tar.gz
xlnx-zynqmp: Connect the SPI devices
Connect the Xilinx SPI devices to the ZynqMP model. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> [ PC changes * Use QOM alias for bus connectivity on SoC level ] Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> [PMM: free the g_strdup_printf() string when finished with it] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/arm/xlnx-zynqmp.c31
1 files changed, 31 insertions, 0 deletions
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 57e926d..1508d08 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -57,6 +57,14 @@ static const int sdhci_intr[XLNX_ZYNQMP_NUM_SDHCI] = {
48, 49,
};
+static const uint64_t spi_addr[XLNX_ZYNQMP_NUM_SPIS] = {
+ 0xFF040000, 0xFF050000,
+};
+
+static const int spi_intr[XLNX_ZYNQMP_NUM_SPIS] = {
+ 19, 20,
+};
+
typedef struct XlnxZynqMPGICRegion {
int region_index;
uint32_t address;
@@ -118,6 +126,12 @@ static void xlnx_zynqmp_init(Object *obj)
qdev_set_parent_bus(DEVICE(&s->sdhci[i]),
sysbus_get_default());
}
+
+ for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
+ object_initialize(&s->spi[i], sizeof(s->spi[i]),
+ TYPE_XILINX_SPIPS);
+ qdev_set_parent_bus(DEVICE(&s->spi[i]), sysbus_get_default());
+ }
}
static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
@@ -324,6 +338,23 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci[i]), 0,
gic_spi[sdhci_intr[i]]);
}
+
+ for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
+ gchar *bus_name;
+
+ object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err);
+
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, spi_addr[i]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0,
+ gic_spi[spi_intr[i]]);
+
+ /* Alias controller SPI bus to the SoC itself */
+ bus_name = g_strdup_printf("spi%d", i);
+ object_property_add_alias(OBJECT(s), bus_name,
+ OBJECT(&s->spi[i]), "spi0",
+ &error_abort);
+ g_free(bus_name);
+ }
}
static Property xlnx_zynqmp_props[] = {
OpenPOWER on IntegriCloud