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author | Anthony Liguori <aliguori@us.ibm.com> | 2013-07-29 14:39:49 -0500 |
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committer | Anthony Liguori <aliguori@us.ibm.com> | 2013-07-29 14:39:49 -0500 |
commit | 6a4992d0bdeb38a57314d731d9846063b2057e6c (patch) | |
tree | 10d359f7bec5918dd1fc6d9a445213f3019d1929 /hw/timer/pl031.c | |
parent | eddbf0ab9db8385d7cb57e23891c1d41488b303e (diff) | |
parent | b67964d70219a864ec427e727754a205475c7d6c (diff) | |
download | hqemu-6a4992d0bdeb38a57314d731d9846063b2057e6c.zip hqemu-6a4992d0bdeb38a57314d731d9846063b2057e6c.tar.gz |
Merge remote-tracking branch 'afaerber/tags/qom-devices-for-anthony' into staging
QOM device refactorings
* Replace all uses of FROM_SYSBUS() macro with QOM cast macros
i) "QOM cast cleanup for X"
Indicates a mechanical 1:1 between TYPE_* and *State.
ii) "QOM'ify X and Y"
Indicates abstract types may have been inserted or similar changes
to type hierarchy.
ii) Renames
Coding Style fixes such as CamelCase have been applied in some cases.
* Fix for sparc floppy - cf. ii) above
* Change PCI type hierarchy to provide PCI_BRIDGE() casts
* In doing so, prepare for adopting QOM realize
# gpg: Signature made Mon 29 Jul 2013 02:15:22 PM CDT using RSA key ID 3E7E013F
# gpg: Can't check signature: public key not found
# By Andreas Färber (171) and others
# Via Andreas Färber
* afaerber/tags/qom-devices-for-anthony: (173 commits)
sysbus: QOM parent field cleanup for SysBusDevice
spapr_pci: QOM cast cleanup
ioapic: QOM cast cleanup
kvm/ioapic: QOM cast cleanup
kvmvapic: QOM cast cleanup
mipsnet: QOM cast cleanup
opencores_eth: QOM cast cleanup
exynos4210_i2c: QOM cast cleanup
sysbus: Remove unused sysbus_new() prototype
sysbus: Drop FROM_SYSBUS()
xilinx_timer: QOM cast cleanup
tusb6010: QOM cast cleanup
slavio_timer: QOM cast cleanup
pxa2xx_timer: QOM'ify pxa25x-timer and pxa27x-timer
puv3_ost: QOM cast cleanup
pl031: QOM cast cleanup
pl031: Rename pl031_state to PL031State
milkymist-sysctl: QOM cast cleanup
m48t59: QOM cast cleanup for M48t59SysBusState
lm32_timer: QOM cast cleanup
...
Diffstat (limited to 'hw/timer/pl031.c')
-rw-r--r-- | hw/timer/pl031.c | 44 |
1 files changed, 24 insertions, 20 deletions
diff --git a/hw/timer/pl031.c b/hw/timer/pl031.c index 3ce6ed8..d5e2f3e 100644 --- a/hw/timer/pl031.c +++ b/hw/timer/pl031.c @@ -33,8 +33,12 @@ do { printf("pl031: " fmt , ## __VA_ARGS__); } while (0) #define RTC_MIS 0x18 /* Masked interrupt status register */ #define RTC_ICR 0x1c /* Interrupt clear register */ -typedef struct { - SysBusDevice busdev; +#define TYPE_PL031 "pl031" +#define PL031(obj) OBJECT_CHECK(PL031State, (obj), TYPE_PL031) + +typedef struct PL031State { + SysBusDevice parent_obj; + MemoryRegion iomem; QEMUTimer *timer; qemu_irq irq; @@ -51,34 +55,34 @@ typedef struct { uint32_t cr; uint32_t im; uint32_t is; -} pl031_state; +} PL031State; static const unsigned char pl031_id[] = { 0x31, 0x10, 0x14, 0x00, /* Device ID */ 0x0d, 0xf0, 0x05, 0xb1 /* Cell ID */ }; -static void pl031_update(pl031_state *s) +static void pl031_update(PL031State *s) { qemu_set_irq(s->irq, s->is & s->im); } static void pl031_interrupt(void * opaque) { - pl031_state *s = (pl031_state *)opaque; + PL031State *s = (PL031State *)opaque; s->is = 1; DPRINTF("Alarm raised\n"); pl031_update(s); } -static uint32_t pl031_get_count(pl031_state *s) +static uint32_t pl031_get_count(PL031State *s) { int64_t now = qemu_get_clock_ns(rtc_clock); return s->tick_offset + now / get_ticks_per_sec(); } -static void pl031_set_alarm(pl031_state *s) +static void pl031_set_alarm(PL031State *s) { uint32_t ticks; @@ -98,7 +102,7 @@ static void pl031_set_alarm(pl031_state *s) static uint64_t pl031_read(void *opaque, hwaddr offset, unsigned size) { - pl031_state *s = (pl031_state *)opaque; + PL031State *s = (PL031State *)opaque; if (offset >= 0xfe0 && offset < 0x1000) return pl031_id[(offset - 0xfe0) >> 2]; @@ -136,7 +140,7 @@ static uint64_t pl031_read(void *opaque, hwaddr offset, static void pl031_write(void * opaque, hwaddr offset, uint64_t value, unsigned size) { - pl031_state *s = (pl031_state *)opaque; + PL031State *s = (PL031State *)opaque; switch (offset) { @@ -189,7 +193,7 @@ static const MemoryRegionOps pl031_ops = { static int pl031_init(SysBusDevice *dev) { - pl031_state *s = FROM_SYSBUS(pl031_state, dev); + PL031State *s = PL031(dev); struct tm tm; memory_region_init_io(&s->iomem, OBJECT(s), &pl031_ops, s, "pl031", 0x1000); @@ -205,7 +209,7 @@ static int pl031_init(SysBusDevice *dev) static void pl031_pre_save(void *opaque) { - pl031_state *s = opaque; + PL031State *s = opaque; /* tick_offset is base_time - rtc_clock base time. Instead, we want to * store the base time relative to the vm_clock for backwards-compatibility. */ @@ -215,7 +219,7 @@ static void pl031_pre_save(void *opaque) static int pl031_post_load(void *opaque, int version_id) { - pl031_state *s = opaque; + PL031State *s = opaque; int64_t delta = qemu_get_clock_ns(rtc_clock) - qemu_get_clock_ns(vm_clock); s->tick_offset = s->tick_offset_vmstate - delta / get_ticks_per_sec(); @@ -230,12 +234,12 @@ static const VMStateDescription vmstate_pl031 = { .pre_save = pl031_pre_save, .post_load = pl031_post_load, .fields = (VMStateField[]) { - VMSTATE_UINT32(tick_offset_vmstate, pl031_state), - VMSTATE_UINT32(mr, pl031_state), - VMSTATE_UINT32(lr, pl031_state), - VMSTATE_UINT32(cr, pl031_state), - VMSTATE_UINT32(im, pl031_state), - VMSTATE_UINT32(is, pl031_state), + VMSTATE_UINT32(tick_offset_vmstate, PL031State), + VMSTATE_UINT32(mr, PL031State), + VMSTATE_UINT32(lr, PL031State), + VMSTATE_UINT32(cr, PL031State), + VMSTATE_UINT32(im, PL031State), + VMSTATE_UINT32(is, PL031State), VMSTATE_END_OF_LIST() } }; @@ -251,9 +255,9 @@ static void pl031_class_init(ObjectClass *klass, void *data) } static const TypeInfo pl031_info = { - .name = "pl031", + .name = TYPE_PL031, .parent = TYPE_SYS_BUS_DEVICE, - .instance_size = sizeof(pl031_state), + .instance_size = sizeof(PL031State), .class_init = pl031_class_init, }; |