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author | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-17 17:14:51 +0000 |
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committer | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-17 17:14:51 +0000 |
commit | 87ecb68bdf8a3e40ef885ddbb7ca1797dca40ebf (patch) | |
tree | f8c5c8eb6e34a6d492a9638d62489e7569f8b046 /hw/ppc_mac.h | |
parent | 257514ddce752fe0b4aeb4b7957bc5661eadbef8 (diff) | |
download | hqemu-87ecb68bdf8a3e40ef885ddbb7ca1797dca40ebf.zip hqemu-87ecb68bdf8a3e40ef885ddbb7ca1797dca40ebf.tar.gz |
Break up vl.h.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/ppc_mac.h')
-rw-r--r-- | hw/ppc_mac.h | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/hw/ppc_mac.h b/hw/ppc_mac.h index 7ed7b55..3a26cde 100644 --- a/hw/ppc_mac.h +++ b/hw/ppc_mac.h @@ -68,4 +68,58 @@ void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len); uint32_t macio_nvram_read (void *opaque, uint32_t addr); void macio_nvram_write (void *opaque, uint32_t addr, uint32_t val); +/* adb.c */ + +#define MAX_ADB_DEVICES 16 + +#define ADB_MAX_OUT_LEN 16 + +typedef struct ADBDevice ADBDevice; + +/* buf = NULL means polling */ +typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out, + const uint8_t *buf, int len); +typedef int ADBDeviceReset(ADBDevice *d); + +struct ADBDevice { + struct ADBBusState *bus; + int devaddr; + int handler; + ADBDeviceRequest *devreq; + ADBDeviceReset *devreset; + void *opaque; +}; + +typedef struct ADBBusState { + ADBDevice devices[MAX_ADB_DEVICES]; + int nb_devices; + int poll_index; +} ADBBusState; + +int adb_request(ADBBusState *s, uint8_t *buf_out, + const uint8_t *buf, int len); +int adb_poll(ADBBusState *s, uint8_t *buf_out); + +ADBDevice *adb_register_device(ADBBusState *s, int devaddr, + ADBDeviceRequest *devreq, + ADBDeviceReset *devreset, + void *opaque); +void adb_kbd_init(ADBBusState *bus); +void adb_mouse_init(ADBBusState *bus); + +extern ADBBusState adb_bus; + +/* openpic.c */ +/* OpenPIC have 5 outputs per CPU connected and one IRQ out single output */ +enum { + OPENPIC_OUTPUT_INT = 0, /* IRQ */ + OPENPIC_OUTPUT_CINT, /* critical IRQ */ + OPENPIC_OUTPUT_MCK, /* Machine check event */ + OPENPIC_OUTPUT_DEBUG, /* Inconditional debug event */ + OPENPIC_OUTPUT_RESET, /* Core reset event */ + OPENPIC_OUTPUT_NB, +}; +qemu_irq *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus, + qemu_irq **irqs, qemu_irq irq_out); + #endif /* !defined(__PPC_MAC_H__) */ |