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authorAvi Kivity <avi@redhat.com>2011-08-15 17:17:17 +0300
committerAnthony Liguori <aliguori@us.ibm.com>2011-08-22 10:20:10 -0500
commit755c08022507c451d33135eca2a0d2c8a8b78286 (patch)
tree8cb50342278c6dd5ea490debac7ee69bc5fc5238 /hw/mpcore.c
parent312b4234c66e7c0de95e7a8df70dff21e58c15a7 (diff)
downloadhqemu-755c08022507c451d33135eca2a0d2c8a8b78286.zip
hqemu-755c08022507c451d33135eca2a0d2c8a8b78286.tar.gz
arm_gic: convert to memory API
Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/mpcore.c')
-rw-r--r--hw/mpcore.c37
1 files changed, 17 insertions, 20 deletions
diff --git a/hw/mpcore.c b/hw/mpcore.c
index d778507..d6175cf 100644
--- a/hw/mpcore.c
+++ b/hw/mpcore.c
@@ -40,6 +40,8 @@ typedef struct mpcore_priv_state {
int iomemtype;
mpcore_timer_state timer[8];
uint32_t num_cpu;
+ MemoryRegion iomem;
+ MemoryRegion container;
} mpcore_priv_state;
/* Per-CPU Timers. */
@@ -151,7 +153,8 @@ static void mpcore_timer_init(mpcore_priv_state *mpcore,
/* Per-CPU private memory mapped IO. */
-static uint32_t mpcore_priv_read(void *opaque, target_phys_addr_t offset)
+static uint64_t mpcore_priv_read(void *opaque, target_phys_addr_t offset,
+ unsigned size)
{
mpcore_priv_state *s = (mpcore_priv_state *)opaque;
int id;
@@ -203,7 +206,7 @@ bad_reg:
}
static void mpcore_priv_write(void *opaque, target_phys_addr_t offset,
- uint32_t value)
+ uint64_t value, unsigned size)
{
mpcore_priv_state *s = (mpcore_priv_state *)opaque;
int id;
@@ -250,23 +253,19 @@ bad_reg:
hw_error("mpcore_priv_read: Bad offset %x\n", (int)offset);
}
-static CPUReadMemoryFunc * const mpcore_priv_readfn[] = {
- mpcore_priv_read,
- mpcore_priv_read,
- mpcore_priv_read
+static const MemoryRegionOps mpcore_priv_ops = {
+ .read = mpcore_priv_read,
+ .write = mpcore_priv_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
-static CPUWriteMemoryFunc * const mpcore_priv_writefn[] = {
- mpcore_priv_write,
- mpcore_priv_write,
- mpcore_priv_write
-};
-
-static void mpcore_priv_map(SysBusDevice *dev, target_phys_addr_t base)
+static void mpcore_priv_map_setup(mpcore_priv_state *s)
{
- mpcore_priv_state *s = FROM_SYSBUSGIC(mpcore_priv_state, dev);
- cpu_register_physical_memory(base, 0x1000, s->iomemtype);
- cpu_register_physical_memory(base + 0x1000, 0x1000, s->gic.iomemtype);
+ memory_region_init(&s->container, "mpcode-priv-container", 0x2000);
+ memory_region_init_io(&s->iomem, &mpcore_priv_ops, s, "mpcode-priv",
+ 0x1000);
+ memory_region_add_subregion(&s->container, 0, &s->iomem);
+ memory_region_add_subregion(&s->container, 0x1000, &s->gic.iomem);
}
static int mpcore_priv_init(SysBusDevice *dev)
@@ -275,10 +274,8 @@ static int mpcore_priv_init(SysBusDevice *dev)
int i;
gic_init(&s->gic, s->num_cpu);
- s->iomemtype = cpu_register_io_memory(mpcore_priv_readfn,
- mpcore_priv_writefn, s,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio_cb(dev, 0x2000, mpcore_priv_map);
+ mpcore_priv_map_setup(s);
+ sysbus_init_mmio_region(dev, &s->container);
for (i = 0; i < s->num_cpu * 2; i++) {
mpcore_timer_init(s, &s->timer[i], i);
}
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