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author | Blue Swirl <blauwirbel@gmail.com> | 2010-02-05 18:48:36 +0000 |
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committer | Blue Swirl <blauwirbel@gmail.com> | 2010-02-05 18:48:36 +0000 |
commit | e1c6bbabee30db2e007e7fcbdaf088c54151f1d0 (patch) | |
tree | 96bed9eb4262f39ee219a4db1f8a75ccf9f4b368 /hw/grackle_pci.c | |
parent | b29a7def92a47a94fb1a8259db140a464341f778 (diff) | |
download | hqemu-e1c6bbabee30db2e007e7fcbdaf088c54151f1d0.zip hqemu-e1c6bbabee30db2e007e7fcbdaf088c54151f1d0.tar.gz |
Refactor DEC 21154 PCI bridge
It's currently not used by PPC machines. Refactor so that also Sparc64
machines can use it.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw/grackle_pci.c')
-rw-r--r-- | hw/grackle_pci.c | 51 |
1 files changed, 0 insertions, 51 deletions
diff --git a/hw/grackle_pci.c b/hw/grackle_pci.c index f455c59..c026bf2 100644 --- a/hw/grackle_pci.c +++ b/hw/grackle_pci.c @@ -119,20 +119,6 @@ static int pci_grackle_init_device(SysBusDevice *dev) return 0; } -static int pci_dec_21154_init_device(SysBusDevice *dev) -{ - GrackleState *s; - int pci_mem_config, pci_mem_data; - - s = FROM_SYSBUS(GrackleState, dev); - - pci_mem_config = pci_host_conf_register_mmio(&s->host_state); - pci_mem_data = pci_host_data_register_mmio(&s->host_state); - sysbus_init_mmio(dev, 0x1000, pci_mem_config); - sysbus_init_mmio(dev, 0x1000, pci_mem_data); - return 0; -} - static int grackle_pci_host_init(PCIDevice *d) { pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_MOTOROLA); @@ -144,54 +130,17 @@ static int grackle_pci_host_init(PCIDevice *d) return 0; } -static int dec_21154_pci_host_init(PCIDevice *d) -{ - /* PCI2PCI bridge same values as PearPC - check this */ - pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_DEC); - pci_config_set_device_id(d->config, PCI_DEVICE_ID_DEC_21154); - d->config[0x08] = 0x02; // revision - pci_config_set_class(d->config, PCI_CLASS_BRIDGE_PCI); - d->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_BRIDGE; // header_type - - d->config[0x18] = 0x0; // primary_bus - d->config[0x19] = 0x1; // secondary_bus - d->config[0x1a] = 0x1; // subordinate_bus - d->config[0x1c] = 0x10; // io_base - d->config[0x1d] = 0x20; // io_limit - - d->config[0x20] = 0x80; // memory_base - d->config[0x21] = 0x80; - d->config[0x22] = 0x90; // memory_limit - d->config[0x23] = 0x80; - - d->config[0x24] = 0x00; // prefetchable_memory_base - d->config[0x25] = 0x84; - d->config[0x26] = 0x00; // prefetchable_memory_limit - d->config[0x27] = 0x85; - return 0; -} - static PCIDeviceInfo grackle_pci_host_info = { .qdev.name = "grackle", .qdev.size = sizeof(PCIDevice), .init = grackle_pci_host_init, }; -static PCIDeviceInfo dec_21154_pci_host_info = { - .qdev.name = "dec-21154", - .qdev.size = sizeof(PCIDevice), - .init = dec_21154_pci_host_init, - .header_type = PCI_HEADER_TYPE_BRIDGE, -}; - static void grackle_register_devices(void) { sysbus_register_dev("grackle", sizeof(GrackleState), pci_grackle_init_device); pci_qdev_register(&grackle_pci_host_info); - sysbus_register_dev("dec-21154", sizeof(GrackleState), - pci_dec_21154_init_device); - pci_qdev_register(&dec_21154_pci_host_info); } device_init(grackle_register_devices) |