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authorAnthony Liguori <aliguori@us.ibm.com>2011-12-14 07:59:21 -0600
committerAnthony Liguori <aliguori@us.ibm.com>2011-12-14 07:59:21 -0600
commit9423a2e8dd362a271bfe194ec131062814557b95 (patch)
tree6b10b2d69e5d81b6ff4cb2ba75693d8a65362d92 /hw/etraxfs_pic.c
parentda5361cc685c004d8bb4e7c5e7b3a52c7aca2c56 (diff)
parent126c79133f77d1b0b7c3849899c6d5f83b2fd410 (diff)
downloadhqemu-9423a2e8dd362a271bfe194ec131062814557b95.zip
hqemu-9423a2e8dd362a271bfe194ec131062814557b95.tar.gz
Merge remote-tracking branch 'stefanha/trivial-patches-next' into staging
Diffstat (limited to 'hw/etraxfs_pic.c')
-rw-r--r--hw/etraxfs_pic.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/etraxfs_pic.c b/hw/etraxfs_pic.c
index 72cbdb8..993d6a8 100644
--- a/hw/etraxfs_pic.c
+++ b/hw/etraxfs_pic.c
@@ -53,7 +53,7 @@ static void pic_update(struct etrax_pic *fs)
fs->regs[R_R_MASKED_VECT] = fs->regs[R_R_VECT] & fs->regs[R_RW_MASK];
- /* The ETRAX interrupt controller signals interrupts to teh core
+ /* The ETRAX interrupt controller signals interrupts to the core
through an interrupt request wire and an irq vector bus. If
multiple interrupts are simultaneously active it chooses vector
0x30 and lets the sw choose the priorities. */
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