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| author | Rob Herring <rob.herring@linaro.org> | 2014-03-18 13:18:41 -0500 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-03-18 19:38:56 +0000 |
| commit | f72dbf3d2629be75d50b4c98816c360d82e8a848 (patch) | |
| tree | 3563263d5861e88b221a463183ef72526597258a /hw/char/pl011.c | |
| parent | ce8f0905a59232982c8a220169e11c14c73e7dea (diff) | |
| download | hqemu-f72dbf3d2629be75d50b4c98816c360d82e8a848.zip hqemu-f72dbf3d2629be75d50b4c98816c360d82e8a848.tar.gz | |
pl011: fix incorrect logic to set the RXFF flag
The receive fifo full bit should be set when 1 character is received and
the fifo is disabled or when 16 characters are in the fifo.
Signed-off-by: Rob Herring <rob.herring@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1395166721-15716-4-git-send-email-robherring2@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/char/pl011.c')
| -rw-r--r-- | hw/char/pl011.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/char/pl011.c b/hw/char/pl011.c index 11c3a75..644aad7 100644 --- a/hw/char/pl011.c +++ b/hw/char/pl011.c @@ -221,7 +221,7 @@ static void pl011_put_fifo(void *opaque, uint32_t value) s->read_fifo[slot] = value; s->read_count++; s->flags &= ~PL011_FLAG_RXFE; - if (s->cr & 0x10 || s->read_count == 16) { + if (!(s->lcr & 0x10) || s->read_count == 16) { s->flags |= PL011_FLAG_RXFF; } if (s->read_count == s->read_trigger) { |
