summaryrefslogtreecommitdiffstats
path: root/hw/char/pl011.c
diff options
context:
space:
mode:
authorAnthony Liguori <aliguori@us.ibm.com>2013-07-29 14:39:49 -0500
committerAnthony Liguori <aliguori@us.ibm.com>2013-07-29 14:39:49 -0500
commit6a4992d0bdeb38a57314d731d9846063b2057e6c (patch)
tree10d359f7bec5918dd1fc6d9a445213f3019d1929 /hw/char/pl011.c
parenteddbf0ab9db8385d7cb57e23891c1d41488b303e (diff)
parentb67964d70219a864ec427e727754a205475c7d6c (diff)
downloadhqemu-6a4992d0bdeb38a57314d731d9846063b2057e6c.zip
hqemu-6a4992d0bdeb38a57314d731d9846063b2057e6c.tar.gz
Merge remote-tracking branch 'afaerber/tags/qom-devices-for-anthony' into staging
QOM device refactorings * Replace all uses of FROM_SYSBUS() macro with QOM cast macros i) "QOM cast cleanup for X" Indicates a mechanical 1:1 between TYPE_* and *State. ii) "QOM'ify X and Y" Indicates abstract types may have been inserted or similar changes to type hierarchy. ii) Renames Coding Style fixes such as CamelCase have been applied in some cases. * Fix for sparc floppy - cf. ii) above * Change PCI type hierarchy to provide PCI_BRIDGE() casts * In doing so, prepare for adopting QOM realize # gpg: Signature made Mon 29 Jul 2013 02:15:22 PM CDT using RSA key ID 3E7E013F # gpg: Can't check signature: public key not found # By Andreas Färber (171) and others # Via Andreas Färber * afaerber/tags/qom-devices-for-anthony: (173 commits) sysbus: QOM parent field cleanup for SysBusDevice spapr_pci: QOM cast cleanup ioapic: QOM cast cleanup kvm/ioapic: QOM cast cleanup kvmvapic: QOM cast cleanup mipsnet: QOM cast cleanup opencores_eth: QOM cast cleanup exynos4210_i2c: QOM cast cleanup sysbus: Remove unused sysbus_new() prototype sysbus: Drop FROM_SYSBUS() xilinx_timer: QOM cast cleanup tusb6010: QOM cast cleanup slavio_timer: QOM cast cleanup pxa2xx_timer: QOM'ify pxa25x-timer and pxa27x-timer puv3_ost: QOM cast cleanup pl031: QOM cast cleanup pl031: Rename pl031_state to PL031State milkymist-sysctl: QOM cast cleanup m48t59: QOM cast cleanup for M48t59SysBusState lm32_timer: QOM cast cleanup ...
Diffstat (limited to 'hw/char/pl011.c')
-rw-r--r--hw/char/pl011.c110
1 files changed, 56 insertions, 54 deletions
diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index ebec64f..a8ae6f4 100644
--- a/hw/char/pl011.c
+++ b/hw/char/pl011.c
@@ -10,8 +10,12 @@
#include "hw/sysbus.h"
#include "sysemu/char.h"
-typedef struct {
- SysBusDevice busdev;
+#define TYPE_PL011 "pl011"
+#define PL011(obj) OBJECT_CHECK(PL011State, (obj), TYPE_PL011)
+
+typedef struct PL011State {
+ SysBusDevice parent_obj;
+
MemoryRegion iomem;
uint32_t readbuff;
uint32_t flags;
@@ -31,7 +35,7 @@ typedef struct {
CharDriverState *chr;
qemu_irq irq;
const unsigned char *id;
-} pl011_state;
+} PL011State;
#define PL011_INT_TX 0x20
#define PL011_INT_RX 0x10
@@ -46,7 +50,7 @@ static const unsigned char pl011_id_arm[8] =
static const unsigned char pl011_id_luminary[8] =
{ 0x11, 0x00, 0x18, 0x01, 0x0d, 0xf0, 0x05, 0xb1 };
-static void pl011_update(pl011_state *s)
+static void pl011_update(PL011State *s)
{
uint32_t flags;
@@ -57,7 +61,7 @@ static void pl011_update(pl011_state *s)
static uint64_t pl011_read(void *opaque, hwaddr offset,
unsigned size)
{
- pl011_state *s = (pl011_state *)opaque;
+ PL011State *s = (PL011State *)opaque;
uint32_t c;
if (offset >= 0xfe0 && offset < 0x1000) {
@@ -113,7 +117,7 @@ static uint64_t pl011_read(void *opaque, hwaddr offset,
}
}
-static void pl011_set_read_trigger(pl011_state *s)
+static void pl011_set_read_trigger(PL011State *s)
{
#if 0
/* The docs say the RX interrupt is triggered when the FIFO exceeds
@@ -130,7 +134,7 @@ static void pl011_set_read_trigger(pl011_state *s)
static void pl011_write(void *opaque, hwaddr offset,
uint64_t value, unsigned size)
{
- pl011_state *s = (pl011_state *)opaque;
+ PL011State *s = (PL011State *)opaque;
unsigned char ch;
switch (offset >> 2) {
@@ -191,7 +195,7 @@ static void pl011_write(void *opaque, hwaddr offset,
static int pl011_can_receive(void *opaque)
{
- pl011_state *s = (pl011_state *)opaque;
+ PL011State *s = (PL011State *)opaque;
if (s->lcr & 0x10)
return s->read_count < 16;
@@ -201,7 +205,7 @@ static int pl011_can_receive(void *opaque)
static void pl011_put_fifo(void *opaque, uint32_t value)
{
- pl011_state *s = (pl011_state *)opaque;
+ PL011State *s = (PL011State *)opaque;
int slot;
slot = s->read_pos + s->read_count;
@@ -242,83 +246,81 @@ static const VMStateDescription vmstate_pl011 = {
.minimum_version_id = 1,
.minimum_version_id_old = 1,
.fields = (VMStateField[]) {
- VMSTATE_UINT32(readbuff, pl011_state),
- VMSTATE_UINT32(flags, pl011_state),
- VMSTATE_UINT32(lcr, pl011_state),
- VMSTATE_UINT32(cr, pl011_state),
- VMSTATE_UINT32(dmacr, pl011_state),
- VMSTATE_UINT32(int_enabled, pl011_state),
- VMSTATE_UINT32(int_level, pl011_state),
- VMSTATE_UINT32_ARRAY(read_fifo, pl011_state, 16),
- VMSTATE_UINT32(ilpr, pl011_state),
- VMSTATE_UINT32(ibrd, pl011_state),
- VMSTATE_UINT32(fbrd, pl011_state),
- VMSTATE_UINT32(ifl, pl011_state),
- VMSTATE_INT32(read_pos, pl011_state),
- VMSTATE_INT32(read_count, pl011_state),
- VMSTATE_INT32(read_trigger, pl011_state),
+ VMSTATE_UINT32(readbuff, PL011State),
+ VMSTATE_UINT32(flags, PL011State),
+ VMSTATE_UINT32(lcr, PL011State),
+ VMSTATE_UINT32(cr, PL011State),
+ VMSTATE_UINT32(dmacr, PL011State),
+ VMSTATE_UINT32(int_enabled, PL011State),
+ VMSTATE_UINT32(int_level, PL011State),
+ VMSTATE_UINT32_ARRAY(read_fifo, PL011State, 16),
+ VMSTATE_UINT32(ilpr, PL011State),
+ VMSTATE_UINT32(ibrd, PL011State),
+ VMSTATE_UINT32(fbrd, PL011State),
+ VMSTATE_UINT32(ifl, PL011State),
+ VMSTATE_INT32(read_pos, PL011State),
+ VMSTATE_INT32(read_count, PL011State),
+ VMSTATE_INT32(read_trigger, PL011State),
VMSTATE_END_OF_LIST()
}
};
-static int pl011_init(SysBusDevice *dev, const unsigned char *id)
+static void pl011_init(Object *obj)
{
- pl011_state *s = FROM_SYSBUS(pl011_state, dev);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+ PL011State *s = PL011(obj);
memory_region_init_io(&s->iomem, OBJECT(s), &pl011_ops, s, "pl011", 0x1000);
- sysbus_init_mmio(dev, &s->iomem);
- sysbus_init_irq(dev, &s->irq);
- s->id = id;
- s->chr = qemu_char_get_next_serial();
+ sysbus_init_mmio(sbd, &s->iomem);
+ sysbus_init_irq(sbd, &s->irq);
s->read_trigger = 1;
s->ifl = 0x12;
s->cr = 0x300;
s->flags = 0x90;
- if (s->chr) {
- qemu_chr_add_handlers(s->chr, pl011_can_receive, pl011_receive,
- pl011_event, s);
- }
- vmstate_register(&dev->qdev, -1, &vmstate_pl011, s);
- return 0;
-}
-static int pl011_arm_init(SysBusDevice *dev)
-{
- return pl011_init(dev, pl011_id_arm);
+ s->id = pl011_id_arm;
}
-static int pl011_luminary_init(SysBusDevice *dev)
+static void pl011_realize(DeviceState *dev, Error **errp)
{
- return pl011_init(dev, pl011_id_luminary);
+ PL011State *s = PL011(dev);
+
+ s->chr = qemu_char_get_next_serial();
+
+ if (s->chr) {
+ qemu_chr_add_handlers(s->chr, pl011_can_receive, pl011_receive,
+ pl011_event, s);
+ }
}
-static void pl011_arm_class_init(ObjectClass *klass, void *data)
+static void pl011_class_init(ObjectClass *oc, void *data)
{
- SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+ DeviceClass *dc = DEVICE_CLASS(oc);
- sdc->init = pl011_arm_init;
+ dc->realize = pl011_realize;
+ dc->vmsd = &vmstate_pl011;
}
static const TypeInfo pl011_arm_info = {
- .name = "pl011",
+ .name = TYPE_PL011,
.parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(pl011_state),
- .class_init = pl011_arm_class_init,
+ .instance_size = sizeof(PL011State),
+ .instance_init = pl011_init,
+ .class_init = pl011_class_init,
};
-static void pl011_luminary_class_init(ObjectClass *klass, void *data)
+static void pl011_luminary_init(Object *obj)
{
- SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+ PL011State *s = PL011(obj);
- sdc->init = pl011_luminary_init;
+ s->id = pl011_id_luminary;
}
static const TypeInfo pl011_luminary_info = {
.name = "pl011_luminary",
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(pl011_state),
- .class_init = pl011_luminary_class_init,
+ .parent = TYPE_PL011,
+ .instance_init = pl011_luminary_init,
};
static void pl011_register_types(void)
OpenPOWER on IntegriCloud