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authorpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2007-11-17 17:14:51 +0000
committerpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2007-11-17 17:14:51 +0000
commit87ecb68bdf8a3e40ef885ddbb7ca1797dca40ebf (patch)
treef8c5c8eb6e34a6d492a9638d62489e7569f8b046 /hw/arm_pic.h
parent257514ddce752fe0b4aeb4b7957bc5661eadbef8 (diff)
downloadhqemu-87ecb68bdf8a3e40ef885ddbb7ca1797dca40ebf.zip
hqemu-87ecb68bdf8a3e40ef885ddbb7ca1797dca40ebf.tar.gz
Break up vl.h.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/arm_pic.h')
-rw-r--r--hw/arm_pic.h23
1 files changed, 0 insertions, 23 deletions
diff --git a/hw/arm_pic.h b/hw/arm_pic.h
deleted file mode 100644
index 1eba2ba..0000000
--- a/hw/arm_pic.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * Generic ARM Programmable Interrupt Controller support.
- *
- * Copyright (c) 2006 CodeSourcery.
- * Written by Paul Brook
- *
- * This code is licenced under the LGPL.
- *
- * Arm hardware uses a wide variety of interrupt handling hardware.
- * This provides a generic framework for connecting interrupt sources and
- * inputs.
- */
-
-#ifndef ARM_INTERRUPT_H
-#define ARM_INTERRUPT_H 1
-
-/* The CPU is also modeled as an interrupt controller. */
-#define ARM_PIC_CPU_IRQ 0
-#define ARM_PIC_CPU_FIQ 1
-qemu_irq *arm_pic_init_cpu(CPUState *env);
-
-#endif /* !ARM_INTERRUPT_H */
-
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