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| author | Peter Maydell <peter.maydell@linaro.org> | 2012-04-13 11:39:07 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2012-04-13 11:39:07 +0000 |
| commit | 386e29554e8f1a7e910682789418aed2094b4ef6 (patch) | |
| tree | 4333899673bb7c4fd356729f265416984e667825 /hw/arm_gic.c | |
| parent | 5181b50fc89d321cf79ed2f2fff5bec0b55e3011 (diff) | |
| download | hqemu-386e29554e8f1a7e910682789418aed2094b4ef6.zip hqemu-386e29554e8f1a7e910682789418aed2094b4ef6.tar.gz | |
hw/arm_gic: Move NCPU definition to arm_gic.c
Move the NCPU definition to arm_gic.c: the maximum number
of CPU interfaces is defined by the GIC architecture specification
to be 8, so we don't need to have this #define in each of the
sources files which currently includes arm_gic.c.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Evgeny Voevodin <e.voevodin@samsung.com>
Diffstat (limited to 'hw/arm_gic.c')
| -rw-r--r-- | hw/arm_gic.c | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/hw/arm_gic.c b/hw/arm_gic.c index 6b34c06..f64a001 100644 --- a/hw/arm_gic.c +++ b/hw/arm_gic.c @@ -15,6 +15,13 @@ #define GIC_MAXIRQ 1020 /* First 32 are private to each CPU (SGIs and PPIs). */ #define GIC_INTERNAL 32 +/* Maximum number of possible CPU interfaces, determined by GIC architecture */ +#ifdef NVIC +#define NCPU 1 +#else +#define NCPU 8 +#endif + //#define DEBUG_GIC #ifdef DEBUG_GIC @@ -50,7 +57,7 @@ typedef struct gic_irq_state unsigned trigger:1; /* nonzero = edge triggered. */ } gic_irq_state; -#define ALL_CPU_MASK ((1 << NCPU) - 1) +#define ALL_CPU_MASK ((unsigned)(((1 << NCPU) - 1))) #if NCPU > 1 #define NUM_CPU(s) ((s)->num_cpu) #else @@ -813,6 +820,10 @@ static void gic_init(gic_state *s, int num_irq) #if NCPU > 1 s->num_cpu = num_cpu; + if (s->num_cpu > NCPU) { + hw_error("requested %u CPUs exceeds GIC maximum %d\n", + num_cpu, NCPU); + } #endif s->num_irq = num_irq + GIC_BASE_IRQ; if (s->num_irq > GIC_MAXIRQ) { |
