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author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2003-09-30 20:57:29 +0000 |
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committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2003-09-30 20:57:29 +0000 |
commit | 93ac68bca5a3332ffacd7bf10e7b9c4cfdab6374 (patch) | |
tree | 75f90d2b022242e53a022846b2d42d7da809cca5 /cpu-all.h | |
parent | 1e43adfc89d2730ab5b24b7a6b5c8ed373b6e284 (diff) | |
download | hqemu-93ac68bca5a3332ffacd7bf10e7b9c4cfdab6374.zip hqemu-93ac68bca5a3332ffacd7bf10e7b9c4cfdab6374.tar.gz |
sparc emulation target (thanx to Thomas M. Ogrisegg)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@388 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'cpu-all.h')
-rw-r--r-- | cpu-all.h | 59 |
1 files changed, 59 insertions, 0 deletions
@@ -188,6 +188,56 @@ static inline void stfq(void *ptr, double v) } #endif +#elif defined(TARGET_WORDS_BIGENDIAN) && !defined(WORDS_BIGENDIAN) + +static inline int lduw(void *ptr) +{ + uint8_t *b = (uint8_t *) ptr; + return (b[0]<<8|b[1]); +} + +static inline int ldsw(void *ptr) +{ + int8_t *b = (int8_t *) ptr; + return (b[0]<<8|b[1]); +} + +static inline int ldl(void *ptr) +{ + uint8_t *b = (uint8_t *) ptr; + return (b[0]<<24|b[1]<<16|b[2]<<8|b[3]); +} + +static inline uint64_t ldq(void *ptr) +{ + uint32_t a,b; + a = ldl (ptr); + b = ldl (ptr+4); + return (((uint64_t)a<<32)|b); +} + +static inline void stw(void *ptr, int v) +{ + uint8_t *d = (uint8_t *) ptr; + d[0] = v >> 8; + d[1] = v; +} + +static inline void stl(void *ptr, int v) +{ + uint8_t *d = (uint8_t *) ptr; + d[0] = v >> 24; + d[1] = v >> 16; + d[2] = v >> 8; + d[3] = v; +} + +static inline void stq(void *ptr, uint64_t v) +{ + stl (ptr, v); + stl (ptr+4, v >> 32); +} + #else static inline int lduw(void *ptr) @@ -297,6 +347,15 @@ void page_unprotect_range(uint8_t *data, unsigned long data_size); #define cpu_interrupt cpu_arm_interrupt #define cpu_signal_handler cpu_arm_signal_handler +#elif defined(TARGET_SPARC) + +#define CPUState CPUSPARCState +#define cpu_init cpu_sparc_init +#define cpu_exec cpu_sparc_exec +#define cpu_gen_code cpu_sparc_gen_code +#define cpu_interrupt cpu_sparc_interrupt +#define cpu_signal_handler cpu_sparc_signal_handler + #else #error unsupported target CPU |