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author | Avi Kivity <avi@redhat.com> | 2012-01-02 17:21:07 +0200 |
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committer | Avi Kivity <avi@redhat.com> | 2012-01-04 13:34:50 +0200 |
commit | 11c7ef0c737f37a487f45c6f3aa070ac7e342e3e (patch) | |
tree | 6d751394e2d0e18889e95ba1df102c95106fc76c /cpu-all.h | |
parent | 75c578dcaae48f239fc87b545022efa8fa13f455 (diff) | |
download | hqemu-11c7ef0c737f37a487f45c6f3aa070ac7e342e3e.zip hqemu-11c7ef0c737f37a487f45c6f3aa070ac7e342e3e.tar.gz |
Remove IO_MEM_SHIFT
We no longer use any of the lower bits of a ram_addr, so we might as well
use them for the io table index. This increases the number of potential
I/O handlers by a factor of 8.
Signed-off-by: Avi Kivity <avi@redhat.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'cpu-all.h')
-rw-r--r-- | cpu-all.h | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -503,7 +503,7 @@ extern int mem_prealloc; 3 flags. The ROMD code stores the page ram offset in iotlb entry, so only a limited number of ids are avaiable. */ -#define IO_MEM_NB_ENTRIES (1 << (TARGET_PAGE_BITS - IO_MEM_SHIFT)) +#define IO_MEM_NB_ENTRIES (1 << TARGET_PAGE_BITS) /* Flags stored in the low bits of the TLB virtual address. These are defined so that fast path ram access is all zeros. */ |