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author | Paul Brook <paul@codesourcery.com> | 2009-05-14 22:35:07 +0100 |
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committer | Paul Brook <paul@codesourcery.com> | 2009-05-14 22:35:07 +0100 |
commit | a63bdb31026648fef5d4ffb3caafc973c8ced53c (patch) | |
tree | 5b285118fb7a701312e7831f703c291cac4d4a96 | |
parent | a5580466257337e74e48124c185e4db9d29325ec (diff) | |
download | hqemu-a63bdb31026648fef5d4ffb3caafc973c8ced53c.zip hqemu-a63bdb31026648fef5d4ffb3caafc973c8ced53c.tar.gz |
PL031 qdev conversion
Signed-off-by: Paul Brook <paul@codesourcery.com>
-rw-r--r-- | hw/integratorcp.c | 2 | ||||
-rw-r--r-- | hw/pl031.c | 21 | ||||
-rw-r--r-- | hw/primecell.h | 3 | ||||
-rw-r--r-- | hw/realview.c | 2 | ||||
-rw-r--r-- | hw/versatilepb.c | 2 |
5 files changed, 16 insertions, 14 deletions
diff --git a/hw/integratorcp.c b/hw/integratorcp.c index 3c7e25f..8966a25 100644 --- a/hw/integratorcp.c +++ b/hw/integratorcp.c @@ -481,7 +481,7 @@ static void integratorcp_init(ram_addr_t ram_size, cpu_pic[ARM_PIC_CPU_FIQ]); icp_pic_init(0xca000000, pic[26], NULL); icp_pit_init(0x13000000, pic, 5); - pl031_init(0x15000000, pic[8]); + sysbus_create_simple("pl031", 0x15000000, pic[8]); sysbus_create_simple("pl011", 0x16000000, pic[1]); sysbus_create_simple("pl011", 0x17000000, pic[2]); icp_control_init(0xcb000000); @@ -9,8 +9,7 @@ * */ -#include "hw.h" -#include "primecell.h" +#include "sysbus.h" #include "qemu-timer.h" //#define DEBUG_PL031 @@ -32,6 +31,7 @@ do { printf("pl031: " fmt , ## __VA_ARGS__); } while (0) #define RTC_ICR 0x1c /* Interrupt clear register */ typedef struct { + SysBusDevice busdev; QEMUTimer *timer; qemu_irq irq; @@ -183,25 +183,30 @@ static CPUReadMemoryFunc * pl031_readfn[] = { pl031_read }; -void pl031_init(uint32_t base, qemu_irq irq) +static void pl031_init(SysBusDevice *dev) { int iomemtype; - pl031_state *s; + pl031_state *s = FROM_SYSBUS(pl031_state, dev); struct tm tm; - s = qemu_mallocz(sizeof(pl031_state)); - iomemtype = cpu_register_io_memory(0, pl031_readfn, pl031_writefn, s); if (iomemtype == -1) { hw_error("pl031_init: Can't register I/O memory\n"); } - cpu_register_physical_memory(base, 0x00001000, iomemtype); + sysbus_init_mmio(dev, 0x1000, iomemtype); - s->irq = irq; + sysbus_init_irq(dev, &s->irq); /* ??? We assume vm_clock is zero at this point. */ qemu_get_timedate(&tm, 0); s->tick_offset = mktimegm(&tm); s->timer = qemu_new_timer(vm_clock, pl031_interrupt, s); } + +static void pl031_register_devices(void) +{ + sysbus_register_dev("pl031", sizeof(pl031_state), pl031_init); +} + +device_init(pl031_register_devices) diff --git a/hw/primecell.h b/hw/primecell.h index 0836447..de28916 100644 --- a/hw/primecell.h +++ b/hw/primecell.h @@ -5,9 +5,6 @@ /* Also includes some devices that are currently only used by the ARM boards. */ -/* pl031.c */ -void pl031_init(uint32_t base, qemu_irq irq); - /* pl022.c */ typedef int (*ssi_xfer_cb)(void *, int); void pl022_init(uint32_t base, qemu_irq irq, ssi_xfer_cb xfer_cb, diff --git a/hw/realview.c b/hw/realview.c index e227f72..4001a0f 100644 --- a/hw/realview.c +++ b/hw/realview.c @@ -104,7 +104,7 @@ static void realview_init(ram_addr_t ram_size, } pl181_init(0x10005000, drives_table[index].bdrv, pic[17], pic[18]); - pl031_init(0x10017000, pic[10]); + sysbus_create_simple("pl031", 0x10017000, pic[10]); pci_bus = pci_vpb_init(pic, 48, 1); if (usb_enabled) { diff --git a/hw/versatilepb.c b/hw/versatilepb.c index 19b66bb..ac630e8 100644 --- a/hw/versatilepb.c +++ b/hw/versatilepb.c @@ -237,7 +237,7 @@ static void versatile_init(ram_addr_t ram_size, #endif /* Add PL031 Real Time Clock. */ - pl031_init(0x101e8000,pic[10]); + sysbus_create_simple("pl031", 0x101e8000, pic[10]); /* Memory map for Versatile/PB: */ /* 0x10000000 System registers. */ |