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authorblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2009-02-28 08:25:29 +0000
committerblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2009-02-28 08:25:29 +0000
commita457e7ee3daeb94b65a1a5a11258bd8b66673269 (patch)
treed25b835099244f7323160b74fb9c12c795c2a659
parent54042bcf24b6c7c1c99f7a022f3cd00ba338f708 (diff)
downloadhqemu-a457e7ee3daeb94b65a1a5a11258bd8b66673269.zip
hqemu-a457e7ee3daeb94b65a1a5a11258bd8b66673269.tar.gz
Fix typo in gen_qemu_ld32s
When the CPU is in little endian mode, it should load values from RAM in byte swapped manner. This check is in all the ld and st functions, but misspelled in gen_qemu_ld32s. This patch fixes the misspelling and makes ppc64 Linux happier. Signed-off-by: Alexander Graf <alex@csgraf.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6654 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r--target-ppc/translate.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index f01a1cf..2a06e4c 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -2624,7 +2624,7 @@ static always_inline void gen_qemu_ld32u(DisasContext *ctx, TCGv arg1, TCGv arg2
#if defined(TARGET_PPC64)
static always_inline void gen_qemu_ld32s(DisasContext *ctx, TCGv arg1, TCGv arg2)
{
- if (unlikely(ctx->mem_idx)) {
+ if (unlikely(ctx->le_mode)) {
TCGv_i32 t0;
tcg_gen_qemu_ld32u(arg1, arg2, ctx->mem_idx);
t0 = tcg_temp_new_i32();
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