diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2014-05-28 17:44:45 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-05-28 17:44:45 +0100 |
| commit | 66226ffd056d85a6b86034dd4bbec687e66ded24 (patch) | |
| tree | 483e0effddf60aaa26253899d8f1af6baf0a21bc | |
| parent | 3ee933c9d4869891a5614fba4815a3857dc3ef8f (diff) | |
| parent | 24666baf1f0a0be454d7c64497dca6d9becc3f40 (diff) | |
| download | hqemu-66226ffd056d85a6b86034dd4bbec687e66ded24.zip hqemu-66226ffd056d85a6b86034dd4bbec687e66ded24.tar.gz | |
Merge remote-tracking branch 'remotes/rth/tcg-next' into staging
* remotes/rth/tcg-next:
tcg/optimize: Remember garbage high bits for 32-bit ops
tcg/optimize: Move updating of gen_opc_buf into tcg_opt_gen_mov*
tcg-sparc: Make debug_frame const
tcg-s390: Make debug_frame const
tcg-arm: Make debug_frame const
tcg-aarch64: Make debug_frame const
tcg-i386: Make debug_frame const
tcg: Allow the debug_frame data structure to be constant
tcg: Move size effects out of dh_arg
tcg: Remove sizemask and flags arguments to tcg_gen_callN
tcg: Save flags and computed sizemask in TCGHelperInfo
tcg: Register the helper info struct rather than the name
tcg: Move side effects out of dh_sizemask
tcg: Inline tcg_gen_helperN
tcg: Use helper-gen.h in tcg-op.h
tcg: Push tcg-runtime routines into exec/helper-*
tcg: Invert the inclusion of helper.h
tcg: Optimize brcond2 and setcond2 ne/eq
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
111 files changed, 712 insertions, 814 deletions
diff --git a/include/exec/def-helper.h b/include/exec/def-helper.h deleted file mode 100644 index 255b58b..0000000 --- a/include/exec/def-helper.h +++ /dev/null @@ -1,274 +0,0 @@ -/* Helper file for declaring TCG helper functions. - Should be included at the start and end of target-foo/helper.h. - - Targets should use DEF_HELPER_N and DEF_HELPER_FLAGS_N to declare helper - functions. Names should be specified without the helper_ prefix, and - the return and argument types specified. 3 basic types are understood - (i32, i64 and ptr). Additional aliases are provided for convenience and - to match the types used by the C helper implementation. - - The target helper.h should be included in all files that use/define - helper functions. THis will ensure that function prototypes are - consistent. In addition it should be included an extra two times for - helper.c, defining: - GEN_HELPER 1 to produce op generation functions (gen_helper_*) - GEN_HELPER 2 to do runtime registration helper functions. - */ - -#ifndef DEF_HELPER_H -#define DEF_HELPER_H 1 - -#define HELPER(name) glue(helper_, name) - -#define GET_TCGV_i32 GET_TCGV_I32 -#define GET_TCGV_i64 GET_TCGV_I64 -#define GET_TCGV_ptr GET_TCGV_PTR - -/* Some types that make sense in C, but not for TCG. */ -#define dh_alias_i32 i32 -#define dh_alias_s32 i32 -#define dh_alias_int i32 -#define dh_alias_i64 i64 -#define dh_alias_s64 i64 -#define dh_alias_f32 i32 -#define dh_alias_f64 i64 -#if TARGET_LONG_BITS == 32 -#define dh_alias_tl i32 -#else -#define dh_alias_tl i64 -#endif -#define dh_alias_ptr ptr -#define dh_alias_void void -#define dh_alias_noreturn noreturn -#define dh_alias_env ptr -#define dh_alias(t) glue(dh_alias_, t) - -#define dh_ctype_i32 uint32_t -#define dh_ctype_s32 int32_t -#define dh_ctype_int int -#define dh_ctype_i64 uint64_t -#define dh_ctype_s64 int64_t -#define dh_ctype_f32 float32 -#define dh_ctype_f64 float64 -#define dh_ctype_tl target_ulong -#define dh_ctype_ptr void * -#define dh_ctype_void void -#define dh_ctype_noreturn void QEMU_NORETURN -#define dh_ctype_env CPUArchState * -#define dh_ctype(t) dh_ctype_##t - -/* We can't use glue() here because it falls foul of C preprocessor - recursive expansion rules. */ -#define dh_retvar_decl0_void void -#define dh_retvar_decl0_noreturn void -#define dh_retvar_decl0_i32 TCGv_i32 retval -#define dh_retvar_decl0_i64 TCGv_i64 retval -#define dh_retvar_decl0_ptr TCGv_ptr retval -#define dh_retvar_decl0(t) glue(dh_retvar_decl0_, dh_alias(t)) - -#define dh_retvar_decl_void -#define dh_retvar_decl_noreturn -#define dh_retvar_decl_i32 TCGv_i32 retval, -#define dh_retvar_decl_i64 TCGv_i64 retval, -#define dh_retvar_decl_ptr TCGv_ptr retval, -#define dh_retvar_decl(t) glue(dh_retvar_decl_, dh_alias(t)) - -#define dh_retvar_void TCG_CALL_DUMMY_ARG -#define dh_retvar_noreturn TCG_CALL_DUMMY_ARG -#define dh_retvar_i32 GET_TCGV_i32(retval) -#define dh_retvar_i64 GET_TCGV_i64(retval) -#define dh_retvar_ptr GET_TCGV_ptr(retval) -#define dh_retvar(t) glue(dh_retvar_, dh_alias(t)) - -#define dh_is_64bit_void 0 -#define dh_is_64bit_noreturn 0 -#define dh_is_64bit_i32 0 -#define dh_is_64bit_i64 1 -#define dh_is_64bit_ptr (sizeof(void *) == 8) -#define dh_is_64bit(t) glue(dh_is_64bit_, dh_alias(t)) - -#define dh_is_signed_void 0 -#define dh_is_signed_noreturn 0 -#define dh_is_signed_i32 0 -#define dh_is_signed_s32 1 -#define dh_is_signed_i64 0 -#define dh_is_signed_s64 1 -#define dh_is_signed_f32 0 -#define dh_is_signed_f64 0 -#define dh_is_signed_tl 0 -#define dh_is_signed_int 1 -/* ??? This is highly specific to the host cpu. There are even special - extension instructions that may be required, e.g. ia64's addp4. But - for now we don't support any 64-bit targets with 32-bit pointers. */ -#define dh_is_signed_ptr 0 -#define dh_is_signed_env dh_is_signed_ptr -#define dh_is_signed(t) dh_is_signed_##t - -#define dh_sizemask(t, n) \ - sizemask |= dh_is_64bit(t) << (n*2); \ - sizemask |= dh_is_signed(t) << (n*2+1) - -#define dh_arg(t, n) \ - args[n - 1] = glue(GET_TCGV_, dh_alias(t))(glue(arg, n)); \ - dh_sizemask(t, n) - -#define dh_arg_decl(t, n) glue(TCGv_, dh_alias(t)) glue(arg, n) - - -#define DEF_HELPER_0(name, ret) \ - DEF_HELPER_FLAGS_0(name, 0, ret) -#define DEF_HELPER_1(name, ret, t1) \ - DEF_HELPER_FLAGS_1(name, 0, ret, t1) -#define DEF_HELPER_2(name, ret, t1, t2) \ - DEF_HELPER_FLAGS_2(name, 0, ret, t1, t2) -#define DEF_HELPER_3(name, ret, t1, t2, t3) \ - DEF_HELPER_FLAGS_3(name, 0, ret, t1, t2, t3) -#define DEF_HELPER_4(name, ret, t1, t2, t3, t4) \ - DEF_HELPER_FLAGS_4(name, 0, ret, t1, t2, t3, t4) -#define DEF_HELPER_5(name, ret, t1, t2, t3, t4, t5) \ - DEF_HELPER_FLAGS_5(name, 0, ret, t1, t2, t3, t4, t5) - -/* MAX_OPC_PARAM_IARGS must be set to n if last entry is DEF_HELPER_FLAGS_n. */ - -#endif /* DEF_HELPER_H */ - -#ifndef GEN_HELPER -/* Function prototypes. */ - -#define DEF_HELPER_FLAGS_0(name, flags, ret) \ -dh_ctype(ret) HELPER(name) (void); - -#define DEF_HELPER_FLAGS_1(name, flags, ret, t1) \ -dh_ctype(ret) HELPER(name) (dh_ctype(t1)); - -#define DEF_HELPER_FLAGS_2(name, flags, ret, t1, t2) \ -dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2)); - -#define DEF_HELPER_FLAGS_3(name, flags, ret, t1, t2, t3) \ -dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3)); - -#define DEF_HELPER_FLAGS_4(name, flags, ret, t1, t2, t3, t4) \ -dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \ - dh_ctype(t4)); - -#define DEF_HELPER_FLAGS_5(name, flags, ret, t1, t2, t3, t4, t5) \ -dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \ - dh_ctype(t4), dh_ctype(t5)); - -#undef GEN_HELPER -#define GEN_HELPER -1 - -#elif GEN_HELPER == 1 -/* Gen functions. */ - -#define DEF_HELPER_FLAGS_0(name, flags, ret) \ -static inline void glue(gen_helper_, name)(dh_retvar_decl0(ret)) \ -{ \ - int sizemask; \ - sizemask = dh_is_64bit(ret); \ - tcg_gen_helperN(HELPER(name), flags, sizemask, dh_retvar(ret), 0, NULL); \ -} - -#define DEF_HELPER_FLAGS_1(name, flags, ret, t1) \ -static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) dh_arg_decl(t1, 1)) \ -{ \ - TCGArg args[1]; \ - int sizemask = 0; \ - dh_sizemask(ret, 0); \ - dh_arg(t1, 1); \ - tcg_gen_helperN(HELPER(name), flags, sizemask, dh_retvar(ret), 1, args); \ -} - -#define DEF_HELPER_FLAGS_2(name, flags, ret, t1, t2) \ -static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) dh_arg_decl(t1, 1), \ - dh_arg_decl(t2, 2)) \ -{ \ - TCGArg args[2]; \ - int sizemask = 0; \ - dh_sizemask(ret, 0); \ - dh_arg(t1, 1); \ - dh_arg(t2, 2); \ - tcg_gen_helperN(HELPER(name), flags, sizemask, dh_retvar(ret), 2, args); \ -} - -#define DEF_HELPER_FLAGS_3(name, flags, ret, t1, t2, t3) \ -static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) dh_arg_decl(t1, 1), \ - dh_arg_decl(t2, 2), dh_arg_decl(t3, 3)) \ -{ \ - TCGArg args[3]; \ - int sizemask = 0; \ - dh_sizemask(ret, 0); \ - dh_arg(t1, 1); \ - dh_arg(t2, 2); \ - dh_arg(t3, 3); \ - tcg_gen_helperN(HELPER(name), flags, sizemask, dh_retvar(ret), 3, args); \ -} - -#define DEF_HELPER_FLAGS_4(name, flags, ret, t1, t2, t3, t4) \ -static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) dh_arg_decl(t1, 1), \ - dh_arg_decl(t2, 2), dh_arg_decl(t3, 3), dh_arg_decl(t4, 4)) \ -{ \ - TCGArg args[4]; \ - int sizemask = 0; \ - dh_sizemask(ret, 0); \ - dh_arg(t1, 1); \ - dh_arg(t2, 2); \ - dh_arg(t3, 3); \ - dh_arg(t4, 4); \ - tcg_gen_helperN(HELPER(name), flags, sizemask, dh_retvar(ret), 4, args); \ -} - -#define DEF_HELPER_FLAGS_5(name, flags, ret, t1, t2, t3, t4, t5) \ -static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \ - dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), dh_arg_decl(t3, 3), \ - dh_arg_decl(t4, 4), dh_arg_decl(t5, 5)) \ -{ \ - TCGArg args[5]; \ - int sizemask = 0; \ - dh_sizemask(ret, 0); \ - dh_arg(t1, 1); \ - dh_arg(t2, 2); \ - dh_arg(t3, 3); \ - dh_arg(t4, 4); \ - dh_arg(t5, 5); \ - tcg_gen_helperN(HELPER(name), flags, sizemask, dh_retvar(ret), 5, args); \ -} - -#undef GEN_HELPER -#define GEN_HELPER -1 - -#elif GEN_HELPER == 2 -/* Register helpers. */ - -#define DEF_HELPER_FLAGS_0(name, flags, ret) { HELPER(name), #name }, - -#define DEF_HELPER_FLAGS_1(name, flags, ret, t1) \ -DEF_HELPER_FLAGS_0(name, flags, ret) - -#define DEF_HELPER_FLAGS_2(name, flags, ret, t1, t2) \ -DEF_HELPER_FLAGS_0(name, flags, ret) - -#define DEF_HELPER_FLAGS_3(name, flags, ret, t1, t2, t3) \ -DEF_HELPER_FLAGS_0(name, flags, ret) - -#define DEF_HELPER_FLAGS_4(name, flags, ret, t1, t2, t3, t4) \ -DEF_HELPER_FLAGS_0(name, flags, ret) - -#define DEF_HELPER_FLAGS_5(name, flags, ret, t1, t2, t3, t4, t5) \ -DEF_HELPER_FLAGS_0(name, flags, ret) - -#undef GEN_HELPER -#define GEN_HELPER -1 - -#elif GEN_HELPER == -1 -/* Undefine macros. */ - -#undef DEF_HELPER_FLAGS_0 -#undef DEF_HELPER_FLAGS_1 -#undef DEF_HELPER_FLAGS_2 -#undef DEF_HELPER_FLAGS_3 -#undef DEF_HELPER_FLAGS_4 -#undef DEF_HELPER_FLAGS_5 -#undef GEN_HELPER - -#endif diff --git a/include/exec/helper-gen.h b/include/exec/helper-gen.h new file mode 100644 index 0000000..a04a034 --- /dev/null +++ b/include/exec/helper-gen.h @@ -0,0 +1,70 @@ +/* Helper file for declaring TCG helper functions. + This one expands generation functions for tcg opcodes. */ + +#ifndef HELPER_GEN_H +#define HELPER_GEN_H 1 + +#include <exec/helper-head.h> + +#define DEF_HELPER_FLAGS_0(name, flags, ret) \ +static inline void glue(gen_helper_, name)(dh_retvar_decl0(ret)) \ +{ \ + tcg_gen_callN(&tcg_ctx, HELPER(name), dh_retvar(ret), 0, NULL); \ +} + +#define DEF_HELPER_FLAGS_1(name, flags, ret, t1) \ +static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \ + dh_arg_decl(t1, 1)) \ +{ \ + TCGArg args[1] = { dh_arg(t1, 1) }; \ + tcg_gen_callN(&tcg_ctx, HELPER(name), dh_retvar(ret), 1, args); \ +} + +#define DEF_HELPER_FLAGS_2(name, flags, ret, t1, t2) \ +static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \ + dh_arg_decl(t1, 1), dh_arg_decl(t2, 2)) \ +{ \ + TCGArg args[2] = { dh_arg(t1, 1), dh_arg(t2, 2) }; \ + tcg_gen_callN(&tcg_ctx, HELPER(name), dh_retvar(ret), 2, args); \ +} + +#define DEF_HELPER_FLAGS_3(name, flags, ret, t1, t2, t3) \ +static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \ + dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), dh_arg_decl(t3, 3)) \ +{ \ + TCGArg args[3] = { dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3) }; \ + tcg_gen_callN(&tcg_ctx, HELPER(name), dh_retvar(ret), 3, args); \ +} + +#define DEF_HELPER_FLAGS_4(name, flags, ret, t1, t2, t3, t4) \ +static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \ + dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), \ + dh_arg_decl(t3, 3), dh_arg_decl(t4, 4)) \ +{ \ + TCGArg args[4] = { dh_arg(t1, 1), dh_arg(t2, 2), \ + dh_arg(t3, 3), dh_arg(t4, 4) }; \ + tcg_gen_callN(&tcg_ctx, HELPER(name), dh_retvar(ret), 4, args); \ +} + +#define DEF_HELPER_FLAGS_5(name, flags, ret, t1, t2, t3, t4, t5) \ +static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) \ + dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), dh_arg_decl(t3, 3), \ + dh_arg_decl(t4, 4), dh_arg_decl(t5, 5)) \ +{ \ + TCGArg args[5] = { dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3), \ + dh_arg(t4, 4), dh_arg(t5, 5) }; \ + tcg_gen_callN(&tcg_ctx, HELPER(name), dh_retvar(ret), 5, args); \ +} + +#include "helper.h" +#include "tcg-runtime.h" + +#undef DEF_HELPER_FLAGS_0 +#undef DEF_HELPER_FLAGS_1 +#undef DEF_HELPER_FLAGS_2 +#undef DEF_HELPER_FLAGS_3 +#undef DEF_HELPER_FLAGS_4 +#undef DEF_HELPER_FLAGS_5 +#undef GEN_HELPER + +#endif /* HELPER_GEN_H */ diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h new file mode 100644 index 0000000..b009ccb --- /dev/null +++ b/include/exec/helper-head.h @@ -0,0 +1,134 @@ +/* Helper file for declaring TCG helper functions. + Used by other helper files. + + Targets should use DEF_HELPER_N and DEF_HELPER_FLAGS_N to declare helper + functions. Names should be specified without the helper_ prefix, and + the return and argument types specified. 3 basic types are understood + (i32, i64 and ptr). Additional aliases are provided for convenience and + to match the types used by the C helper implementation. + + The target helper.h should be included in all files that use/define + helper functions. THis will ensure that function prototypes are + consistent. In addition it should be included an extra two times for + helper.c, defining: + GEN_HELPER 1 to produce op generation functions (gen_helper_*) + GEN_HELPER 2 to do runtime registration helper functions. + */ + +#ifndef DEF_HELPER_H +#define DEF_HELPER_H 1 + +#include "qemu/osdep.h" + +#define HELPER(name) glue(helper_, name) + +#define GET_TCGV_i32 GET_TCGV_I32 +#define GET_TCGV_i64 GET_TCGV_I64 +#define GET_TCGV_ptr GET_TCGV_PTR + +/* Some types that make sense in C, but not for TCG. */ +#define dh_alias_i32 i32 +#define dh_alias_s32 i32 +#define dh_alias_int i32 +#define dh_alias_i64 i64 +#define dh_alias_s64 i64 +#define dh_alias_f32 i32 +#define dh_alias_f64 i64 +#ifdef TARGET_LONG_BITS +# if TARGET_LONG_BITS == 32 +# define dh_alias_tl i32 +# else +# define dh_alias_tl i64 +# endif +#endif +#define dh_alias_ptr ptr +#define dh_alias_void void +#define dh_alias_noreturn noreturn +#define dh_alias_env ptr +#define dh_alias(t) glue(dh_alias_, t) + +#define dh_ctype_i32 uint32_t +#define dh_ctype_s32 int32_t +#define dh_ctype_int int +#define dh_ctype_i64 uint64_t +#define dh_ctype_s64 int64_t +#define dh_ctype_f32 float32 +#define dh_ctype_f64 float64 +#define dh_ctype_tl target_ulong +#define dh_ctype_ptr void * +#define dh_ctype_void void +#define dh_ctype_noreturn void QEMU_NORETURN +#define dh_ctype_env CPUArchState * +#define dh_ctype(t) dh_ctype_##t + +/* We can't use glue() here because it falls foul of C preprocessor + recursive expansion rules. */ +#define dh_retvar_decl0_void void +#define dh_retvar_decl0_noreturn void +#define dh_retvar_decl0_i32 TCGv_i32 retval +#define dh_retvar_decl0_i64 TCGv_i64 retval +#define dh_retvar_decl0_ptr TCGv_ptr retval +#define dh_retvar_decl0(t) glue(dh_retvar_decl0_, dh_alias(t)) + +#define dh_retvar_decl_void +#define dh_retvar_decl_noreturn +#define dh_retvar_decl_i32 TCGv_i32 retval, +#define dh_retvar_decl_i64 TCGv_i64 retval, +#define dh_retvar_decl_ptr TCGv_ptr retval, +#define dh_retvar_decl(t) glue(dh_retvar_decl_, dh_alias(t)) + +#define dh_retvar_void TCG_CALL_DUMMY_ARG +#define dh_retvar_noreturn TCG_CALL_DUMMY_ARG +#define dh_retvar_i32 GET_TCGV_i32(retval) +#define dh_retvar_i64 GET_TCGV_i64(retval) +#define dh_retvar_ptr GET_TCGV_ptr(retval) +#define dh_retvar(t) glue(dh_retvar_, dh_alias(t)) + +#define dh_is_64bit_void 0 +#define dh_is_64bit_noreturn 0 +#define dh_is_64bit_i32 0 +#define dh_is_64bit_i64 1 +#define dh_is_64bit_ptr (sizeof(void *) == 8) +#define dh_is_64bit(t) glue(dh_is_64bit_, dh_alias(t)) + +#define dh_is_signed_void 0 +#define dh_is_signed_noreturn 0 +#define dh_is_signed_i32 0 +#define dh_is_signed_s32 1 +#define dh_is_signed_i64 0 +#define dh_is_signed_s64 1 +#define dh_is_signed_f32 0 +#define dh_is_signed_f64 0 +#define dh_is_signed_tl 0 +#define dh_is_signed_int 1 +/* ??? This is highly specific to the host cpu. There are even special + extension instructions that may be required, e.g. ia64's addp4. But + for now we don't support any 64-bit targets with 32-bit pointers. */ +#define dh_is_signed_ptr 0 +#define dh_is_signed_env dh_is_signed_ptr +#define dh_is_signed(t) dh_is_signed_##t + +#define dh_sizemask(t, n) \ + ((dh_is_64bit(t) << (n*2)) | (dh_is_signed(t) << (n*2+1))) + +#define dh_arg(t, n) \ + glue(GET_TCGV_, dh_alias(t))(glue(arg, n)) + +#define dh_arg_decl(t, n) glue(TCGv_, dh_alias(t)) glue(arg, n) + +#define DEF_HELPER_0(name, ret) \ + DEF_HELPER_FLAGS_0(name, 0, ret) +#define DEF_HELPER_1(name, ret, t1) \ + DEF_HELPER_FLAGS_1(name, 0, ret, t1) +#define DEF_HELPER_2(name, ret, t1, t2) \ + DEF_HELPER_FLAGS_2(name, 0, ret, t1, t2) +#define DEF_HELPER_3(name, ret, t1, t2, t3) \ + DEF_HELPER_FLAGS_3(name, 0, ret, t1, t2, t3) +#define DEF_HELPER_4(name, ret, t1, t2, t3, t4) \ + DEF_HELPER_FLAGS_4(name, 0, ret, t1, t2, t3, t4) +#define DEF_HELPER_5(name, ret, t1, t2, t3, t4, t5) \ + DEF_HELPER_FLAGS_5(name, 0, ret, t1, t2, t3, t4, t5) + +/* MAX_OPC_PARAM_IARGS must be set to n if last entry is DEF_HELPER_FLAGS_n. */ + +#endif /* DEF_HELPER_H */ diff --git a/include/exec/helper-proto.h b/include/exec/helper-proto.h new file mode 100644 index 0000000..828951c --- /dev/null +++ b/include/exec/helper-proto.h @@ -0,0 +1,39 @@ +/* Helper file for declaring TCG helper functions. + This one expands prototypes for the helper functions. */ + +#ifndef HELPER_PROTO_H +#define HELPER_PROTO_H 1 + +#include <exec/helper-head.h> + +#define DEF_HELPER_FLAGS_0(name, flags, ret) \ +dh_ctype(ret) HELPER(name) (void); + +#define DEF_HELPER_FLAGS_1(name, flags, ret, t1) \ +dh_ctype(ret) HELPER(name) (dh_ctype(t1)); + +#define DEF_HELPER_FLAGS_2(name, flags, ret, t1, t2) \ +dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2)); + +#define DEF_HELPER_FLAGS_3(name, flags, ret, t1, t2, t3) \ +dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3)); + +#define DEF_HELPER_FLAGS_4(name, flags, ret, t1, t2, t3, t4) \ +dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \ + dh_ctype(t4)); + +#define DEF_HELPER_FLAGS_5(name, flags, ret, t1, t2, t3, t4, t5) \ +dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \ + dh_ctype(t4), dh_ctype(t5)); + +#include "helper.h" +#include "tcg-runtime.h" + +#undef DEF_HELPER_FLAGS_0 +#undef DEF_HELPER_FLAGS_1 +#undef DEF_HELPER_FLAGS_2 +#undef DEF_HELPER_FLAGS_3 +#undef DEF_HELPER_FLAGS_4 +#undef DEF_HELPER_FLAGS_5 + +#endif /* HELPER_PROTO_H */ diff --git a/include/exec/helper-tcg.h b/include/exec/helper-tcg.h new file mode 100644 index 0000000..d704c81 --- /dev/null +++ b/include/exec/helper-tcg.h @@ -0,0 +1,48 @@ +/* Helper file for declaring TCG helper functions. + This one defines data structures private to tcg.c. */ + +#ifndef HELPER_TCG_H +#define HELPER_TCG_H 1 + +#include <exec/helper-head.h> + +#define DEF_HELPER_FLAGS_0(NAME, FLAGS, ret) \ + { .func = HELPER(NAME), .name = #NAME, .flags = FLAGS, \ + .sizemask = dh_sizemask(ret, 0) }, + +#define DEF_HELPER_FLAGS_1(NAME, FLAGS, ret, t1) \ + { .func = HELPER(NAME), .name = #NAME, .flags = FLAGS, \ + .sizemask = dh_sizemask(ret, 0) | dh_sizemask(t1, 1) }, + +#define DEF_HELPER_FLAGS_2(NAME, FLAGS, ret, t1, t2) \ + { .func = HELPER(NAME), .name = #NAME, .flags = FLAGS, \ + .sizemask = dh_sizemask(ret, 0) | dh_sizemask(t1, 1) \ + | dh_sizemask(t2, 2) }, + +#define DEF_HELPER_FLAGS_3(NAME, FLAGS, ret, t1, t2, t3) \ + { .func = HELPER(NAME), .name = #NAME, .flags = FLAGS, \ + .sizemask = dh_sizemask(ret, 0) | dh_sizemask(t1, 1) \ + | dh_sizemask(t2, 2) | dh_sizemask(t3, 3) }, + +#define DEF_HELPER_FLAGS_4(NAME, FLAGS, ret, t1, t2, t3, t4) \ + { .func = HELPER(NAME), .name = #NAME, .flags = FLAGS, \ + .sizemask = dh_sizemask(ret, 0) | dh_sizemask(t1, 1) \ + | dh_sizemask(t2, 2) | dh_sizemask(t3, 3) | dh_sizemask(t4, 4) }, + +#define DEF_HELPER_FLAGS_5(NAME, FLAGS, ret, t1, t2, t3, t4, t5) \ + { .func = HELPER(NAME), .name = #NAME, .flags = FLAGS, \ + .sizemask = dh_sizemask(ret, 0) | dh_sizemask(t1, 1) \ + | dh_sizemask(t2, 2) | dh_sizemask(t3, 3) | dh_sizemask(t4, 4) \ + | dh_sizemask(t5, 5) }, + +#include "helper.h" +#include "tcg-runtime.h" + +#undef DEF_HELPER_FLAGS_0 +#undef DEF_HELPER_FLAGS_1 +#undef DEF_HELPER_FLAGS_2 +#undef DEF_HELPER_FLAGS_3 +#undef DEF_HELPER_FLAGS_4 +#undef DEF_HELPER_FLAGS_5 + +#endif /* HELPER_TCG_H */ diff --git a/target-alpha/fpu_helper.c b/target-alpha/fpu_helper.c index ee73155..d2d776c 100644 --- a/target-alpha/fpu_helper.c +++ b/target-alpha/fpu_helper.c @@ -18,7 +18,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "fpu/softfloat.h" #define FP_STATUS (env->fp_status) diff --git a/target-alpha/helper.c b/target-alpha/helper.c index cbd03c4..7c053a3 100644 --- a/target-alpha/helper.c +++ b/target-alpha/helper.c @@ -23,7 +23,7 @@ #include "cpu.h" #include "fpu/softfloat.h" -#include "helper.h" +#include "exec/helper-proto.h" uint64_t cpu_alpha_load_fpcr (CPUAlphaState *env) { diff --git a/target-alpha/helper.h b/target-alpha/helper.h index 2389e96..a451cfe 100644 --- a/target-alpha/helper.h +++ b/target-alpha/helper.h @@ -1,5 +1,3 @@ -#include "exec/def-helper.h" - DEF_HELPER_3(excp, noreturn, env, int, int) DEF_HELPER_FLAGS_1(load_pcc, TCG_CALL_NO_RWG_SE, i64, env) @@ -121,5 +119,3 @@ DEF_HELPER_FLAGS_0(get_vmtime, TCG_CALL_NO_RWG, i64) DEF_HELPER_FLAGS_0(get_walltime, TCG_CALL_NO_RWG, i64) DEF_HELPER_FLAGS_2(set_alarm, TCG_CALL_NO_RWG, void, env, i64) #endif - -#include "exec/def-helper.h" diff --git a/target-alpha/int_helper.c b/target-alpha/int_helper.c index 51ccd41..7a205eb 100644 --- a/target-alpha/int_helper.c +++ b/target-alpha/int_helper.c @@ -18,7 +18,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "qemu/host-utils.h" diff --git a/target-alpha/mem_helper.c b/target-alpha/mem_helper.c index 5964bdc..ef6b705 100644 --- a/target-alpha/mem_helper.c +++ b/target-alpha/mem_helper.c @@ -18,7 +18,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" /* Softmmu support */ diff --git a/target-alpha/sys_helper.c b/target-alpha/sys_helper.c index 187ccf7..ae2e174 100644 --- a/target-alpha/sys_helper.c +++ b/target-alpha/sys_helper.c @@ -18,7 +18,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "sysemu/sysemu.h" #include "qemu/timer.h" diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 91c3ed1..e31d56c 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -22,9 +22,8 @@ #include "qemu/host-utils.h" #include "tcg-op.h" -#include "helper.h" -#define GEN_HELPER 1 -#include "helper.h" +#include "exec/helper-proto.h" +#include "exec/helper-gen.h" #undef ALPHA_DEBUG_DISAS #define CONFIG_SOFTFLOAT_INLINE diff --git a/target-arm/crypto_helper.c b/target-arm/crypto_helper.c index f94be69..d8898ed 100644 --- a/target-arm/crypto_helper.c +++ b/target-arm/crypto_helper.c @@ -13,7 +13,7 @@ #include "cpu.h" #include "exec/exec-all.h" -#include "helper.h" +#include "exec/helper-proto.h" union AES_STATE { uint8_t bytes[16]; diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c index b970fd1..cccda74 100644 --- a/target-arm/helper-a64.c +++ b/target-arm/helper-a64.c @@ -19,7 +19,7 @@ #include "cpu.h" #include "exec/gdbstub.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "qemu/host-utils.h" #include "sysemu/sysemu.h" #include "qemu/bitops.h" diff --git a/target-arm/helper.c b/target-arm/helper.c index 6a01c6a..ec031f5 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -1,7 +1,7 @@ #include "cpu.h" #include "internals.h" #include "exec/gdbstub.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "qemu/host-utils.h" #include "sysemu/arch_init.h" #include "sysemu/sysemu.h" diff --git a/target-arm/helper.h b/target-arm/helper.h index a5449e7..b63fd0f 100644 --- a/target-arm/helper.h +++ b/target-arm/helper.h @@ -1,5 +1,3 @@ -#include "exec/def-helper.h" - DEF_HELPER_FLAGS_1(clz, TCG_CALL_NO_RWG_SE, i32, i32) DEF_HELPER_FLAGS_1(sxtb16, TCG_CALL_NO_RWG_SE, i32, i32) DEF_HELPER_FLAGS_1(uxtb16, TCG_CALL_NO_RWG_SE, i32, i32) @@ -521,5 +519,3 @@ DEF_HELPER_2(dc_zva, void, env, i64) #ifdef TARGET_AARCH64 #include "helper-a64.h" #endif - -#include "exec/def-helper.h" diff --git a/target-arm/iwmmxt_helper.c b/target-arm/iwmmxt_helper.c index e6cfa62..398cbcb 100644 --- a/target-arm/iwmmxt_helper.c +++ b/target-arm/iwmmxt_helper.c @@ -24,7 +24,7 @@ #include "cpu.h" #include "exec/exec-all.h" -#include "helper.h" +#include "exec/helper-proto.h" /* iwMMXt macros extracted from GNU gdb. */ diff --git a/target-arm/neon_helper.c b/target-arm/neon_helper.c index 8d6f9a9..492e500 100644 --- a/target-arm/neon_helper.c +++ b/target-arm/neon_helper.c @@ -11,7 +11,7 @@ #include "cpu.h" #include "exec/exec-all.h" -#include "helper.h" +#include "exec/helper-proto.h" #define SIGNBIT (uint32_t)0x80000000 #define SIGNBIT64 ((uint64_t)1 << 63) diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index 50a4157..b28f694 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -17,7 +17,7 @@ * License along with this library; if not, see <http://www.gnu.org/licenses/>. */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "internals.h" #define SIGNBIT (uint32_t)0x80000000 diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index ec6a39d..9f964df 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -31,9 +31,8 @@ #include "exec/gen-icount.h" -#include "helper.h" -#define GEN_HELPER 1 -#include "helper.h" +#include "exec/helper-proto.h" +#include "exec/helper-gen.h" static TCGv_i64 cpu_X[32]; static TCGv_i64 cpu_pc; diff --git a/target-arm/translate.c b/target-arm/translate.c index c2dfbfe..7f6fcd6 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -31,9 +31,8 @@ #include "qemu/log.h" #include "qemu/bitops.h" -#include "helper.h" -#define GEN_HELPER 1 -#include "helper.h" +#include "exec/helper-proto.h" +#include "exec/helper-gen.h" #define ENABLE_ARCH_4T arm_feature(env, ARM_FEATURE_V4T) #define ENABLE_ARCH_5 arm_feature(env, ARM_FEATURE_V5) diff --git a/target-cris/helper.h b/target-cris/helper.h index 0ac31f5..0b383b2 100644 --- a/target-cris/helper.h +++ b/target-cris/helper.h @@ -1,5 +1,3 @@ -#include "exec/def-helper.h" - DEF_HELPER_2(raise_exception, void, env, i32) DEF_HELPER_2(tlb_flush_pid, void, env, i32) DEF_HELPER_2(spc_write, void, env, i32) @@ -25,5 +23,3 @@ DEF_HELPER_FLAGS_3(evaluate_flags_move_4, TCG_CALL_NO_SE, i32, env, i32, i32) DEF_HELPER_FLAGS_3(evaluate_flags_move_2, TCG_CALL_NO_SE, i32, env, i32, i32) DEF_HELPER_1(evaluate_flags, void, env) DEF_HELPER_1(top_evaluate_flags, void, env) - -#include "exec/def-helper.h" diff --git a/target-cris/op_helper.c b/target-cris/op_helper.c index bd9a583..a9bd742 100644 --- a/target-cris/op_helper.c +++ b/target-cris/op_helper.c @@ -20,7 +20,7 @@ #include "cpu.h" #include "mmu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "qemu/host-utils.h" //#define CRIS_OP_HELPER_DEBUG diff --git a/target-cris/translate.c b/target-cris/translate.c index 724f920..90fe0a2 100644 --- a/target-cris/translate.c +++ b/target-cris/translate.c @@ -26,12 +26,11 @@ #include "cpu.h" #include "disas/disas.h" #include "tcg-op.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "mmu.h" #include "crisv32-decode.h" -#define GEN_HELPER 1 -#include "helper.h" +#include "exec/helper-gen.h" #define DISAS_CRIS 0 #if DISAS_CRIS diff --git a/target-i386/cc_helper.c b/target-i386/cc_helper.c index 05dd12b..ecbf0ec 100644 --- a/target-i386/cc_helper.c +++ b/target-i386/cc_helper.c @@ -18,7 +18,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" const uint8_t parity_table[256] = { CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0, diff --git a/target-i386/excp_helper.c b/target-i386/excp_helper.c index f337fd2..99fca84 100644 --- a/target-i386/excp_helper.c +++ b/target-i386/excp_helper.c @@ -20,7 +20,7 @@ #include "cpu.h" #include "qemu/log.h" #include "sysemu/sysemu.h" -#include "helper.h" +#include "exec/helper-proto.h" #if 0 #define raise_exception_err(env, a, b) \ diff --git a/target-i386/fpu_helper.c b/target-i386/fpu_helper.c index de7ba76..a04e754 100644 --- a/target-i386/fpu_helper.c +++ b/target-i386/fpu_helper.c @@ -19,7 +19,7 @@ #include <math.h> #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "qemu/aes.h" #include "qemu/host-utils.h" diff --git a/target-i386/helper.h b/target-i386/helper.h index 3775abe..8eb0145 100644 --- a/target-i386/helper.h +++ b/target-i386/helper.h @@ -1,5 +1,3 @@ -#include "exec/def-helper.h" - DEF_HELPER_FLAGS_4(cc_compute_all, TCG_CALL_NO_RWG_SE, tl, tl, tl, tl, int) DEF_HELPER_FLAGS_4(cc_compute_c, TCG_CALL_NO_RWG_SE, tl, tl, tl, tl, int) @@ -219,5 +217,3 @@ DEF_HELPER_3(rcrl, tl, env, tl, tl) DEF_HELPER_3(rclq, tl, env, tl, tl) DEF_HELPER_3(rcrq, tl, env, tl, tl) #endif - -#include "exec/def-helper.h" diff --git a/target-i386/int_helper.c b/target-i386/int_helper.c index 0555318..b0d78e6 100644 --- a/target-i386/int_helper.c +++ b/target-i386/int_helper.c @@ -19,7 +19,7 @@ #include "cpu.h" #include "qemu/host-utils.h" -#include "helper.h" +#include "exec/helper-proto.h" //#define DEBUG_MULDIV diff --git a/target-i386/mem_helper.c b/target-i386/mem_helper.c index b3b811b..83aa103 100644 --- a/target-i386/mem_helper.c +++ b/target-i386/mem_helper.c @@ -18,7 +18,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #if !defined(CONFIG_USER_ONLY) #include "exec/softmmu_exec.h" diff --git a/target-i386/misc_helper.c b/target-i386/misc_helper.c index 1e2da1e..9cfa25f 100644 --- a/target-i386/misc_helper.c +++ b/target-i386/misc_helper.c @@ -19,7 +19,7 @@ #include "cpu.h" #include "exec/ioport.h" -#include "helper.h" +#include "exec/helper-proto.h" #if !defined(CONFIG_USER_ONLY) #include "exec/softmmu_exec.h" diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c index 3cf862e..258aae8 100644 --- a/target-i386/seg_helper.c +++ b/target-i386/seg_helper.c @@ -20,7 +20,7 @@ #include "cpu.h" #include "qemu/log.h" -#include "helper.h" +#include "exec/helper-proto.h" //#define DEBUG_PCALL diff --git a/target-i386/smm_helper.c b/target-i386/smm_helper.c index 4841d53..5d7697c 100644 --- a/target-i386/smm_helper.c +++ b/target-i386/smm_helper.c @@ -18,7 +18,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" /* SMM support */ diff --git a/target-i386/svm_helper.c b/target-i386/svm_helper.c index 846eaa5..852e2ba 100644 --- a/target-i386/svm_helper.c +++ b/target-i386/svm_helper.c @@ -19,7 +19,7 @@ #include "cpu.h" #include "exec/cpu-all.h" -#include "helper.h" +#include "exec/helper-proto.h" #if !defined(CONFIG_USER_ONLY) #include "exec/softmmu_exec.h" diff --git a/target-i386/translate.c b/target-i386/translate.c index 032b0fd..3aa52eb 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -28,9 +28,8 @@ #include "disas/disas.h" #include "tcg-op.h" -#include "helper.h" -#define GEN_HELPER 1 -#include "helper.h" +#include "exec/helper-proto.h" +#include "exec/helper-gen.h" #define PREFIX_REPZ 0x01 #define PREFIX_REPNZ 0x02 diff --git a/target-lm32/helper.h b/target-lm32/helper.h index f4442e0..445578c 100644 --- a/target-lm32/helper.h +++ b/target-lm32/helper.h @@ -1,5 +1,3 @@ -#include "exec/def-helper.h" - DEF_HELPER_2(raise_exception, void, env, i32) DEF_HELPER_1(hlt, void, env) DEF_HELPER_3(wcsr_bp, void, env, i32, i32) @@ -14,5 +12,3 @@ DEF_HELPER_1(rcsr_ip, i32, env) DEF_HELPER_1(rcsr_jtx, i32, env) DEF_HELPER_1(rcsr_jrx, i32, env) DEF_HELPER_1(ill, void, env) - -#include "exec/def-helper.h" diff --git a/target-lm32/lm32-semi.c b/target-lm32/lm32-semi.c index fc9d2d1..ec6524f 100644 --- a/target-lm32/lm32-semi.c +++ b/target-lm32/lm32-semi.c @@ -15,7 +15,7 @@ #include <string.h> #include <stddef.h> #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "qemu/log.h" #include "exec/softmmu-semi.h" diff --git a/target-lm32/op_helper.c b/target-lm32/op_helper.c index 2f36b7b..40fbed6 100644 --- a/target-lm32/op_helper.c +++ b/target-lm32/op_helper.c @@ -1,6 +1,6 @@ #include <assert.h> #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "qemu/host-utils.h" #include "hw/lm32/lm32_pic.h" diff --git a/target-lm32/translate.c b/target-lm32/translate.c index c8abd1f..51eca06 100644 --- a/target-lm32/translate.c +++ b/target-lm32/translate.c @@ -19,13 +19,12 @@ #include "cpu.h" #include "disas/disas.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "tcg-op.h" #include "hw/lm32/lm32_pic.h" -#define GEN_HELPER 1 -#include "helper.h" +#include "exec/helper-gen.h" #define DISAS_LM32 1 #if DISAS_LM32 diff --git a/target-m68k/helper.c b/target-m68k/helper.c index 077b653..8be9745 100644 --- a/target-m68k/helper.c +++ b/target-m68k/helper.c @@ -21,7 +21,7 @@ #include "cpu.h" #include "exec/gdbstub.h" -#include "helper.h" +#include "exec/helper-proto.h" #define SIGNBIT (1u << 31) diff --git a/target-m68k/helper.h b/target-m68k/helper.h index 2b02450..f4e5fdf 100644 --- a/target-m68k/helper.h +++ b/target-m68k/helper.h @@ -1,5 +1,3 @@ -#include "exec/def-helper.h" - DEF_HELPER_1(bitrev, i32, i32) DEF_HELPER_1(ff1, i32, i32) DEF_HELPER_2(sats, i32, i32, i32) @@ -50,5 +48,3 @@ DEF_HELPER_3(set_mac_extu, void, env, i32, i32) DEF_HELPER_2(flush_flags, void, env, i32) DEF_HELPER_2(raise_exception, void, env, i32) - -#include "exec/def-helper.h" diff --git a/target-m68k/op_helper.c b/target-m68k/op_helper.c index 06302b1..f1ac139 100644 --- a/target-m68k/op_helper.c +++ b/target-m68k/op_helper.c @@ -17,7 +17,7 @@ * License along with this library; if not, see <http://www.gnu.org/licenses/>. */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #if defined(CONFIG_USER_ONLY) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index cd66289..fa248d9 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -23,9 +23,8 @@ #include "tcg-op.h" #include "qemu/log.h" -#include "helper.h" -#define GEN_HELPER 1 -#include "helper.h" +#include "exec/helper-proto.h" +#include "exec/helper-gen.h" //#define DEBUG_DISPATCH 1 diff --git a/target-microblaze/helper.h b/target-microblaze/helper.h index 4e51429..bd13826 100644 --- a/target-microblaze/helper.h +++ b/target-microblaze/helper.h @@ -1,5 +1,3 @@ -#include "exec/def-helper.h" - DEF_HELPER_2(raise_exception, void, env, i32) DEF_HELPER_1(debug, void, env) DEF_HELPER_FLAGS_3(carry, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32) @@ -37,5 +35,3 @@ DEF_HELPER_2(stackprot, void, env, i32) DEF_HELPER_2(get, i32, i32, i32) DEF_HELPER_3(put, void, i32, i32, i32) - -#include "exec/def-helper.h" diff --git a/target-microblaze/op_helper.c b/target-microblaze/op_helper.c index f8fb7f9..b24b878 100644 --- a/target-microblaze/op_helper.c +++ b/target-microblaze/op_helper.c @@ -20,7 +20,7 @@ #include <assert.h> #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "qemu/host-utils.h" #define D(x) diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index 782a489..488df2d 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -21,11 +21,9 @@ #include "cpu.h" #include "disas/disas.h" #include "tcg-op.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "microblaze-decode.h" - -#define GEN_HELPER 1 -#include "helper.h" +#include "exec/helper-gen.h" #define SIM_COMPAT 0 #define DISAS_GNU 1 diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c index a2f46d9..94083fb 100644 --- a/target-mips/dsp_helper.c +++ b/target-mips/dsp_helper.c @@ -18,7 +18,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "qemu/bitops.h" /* As the byte ordering doesn't matter, i.e. all columns are treated diff --git a/target-mips/helper.h b/target-mips/helper.h index 8c7921a..74ef094 100644 --- a/target-mips/helper.h +++ b/target-mips/helper.h @@ -1,5 +1,3 @@ -#include "exec/def-helper.h" - DEF_HELPER_3(raise_exception_err, noreturn, env, i32, int) DEF_HELPER_2(raise_exception, noreturn, env, i32) @@ -691,7 +689,3 @@ DEF_HELPER_FLAGS_3(dmthlip, 0, void, tl, tl, env) #endif DEF_HELPER_FLAGS_3(wrdsp, 0, void, tl, tl, env) DEF_HELPER_FLAGS_2(rddsp, 0, tl, tl, env) - - - -#include "exec/def-helper.h" diff --git a/target-mips/lmi_helper.c b/target-mips/lmi_helper.c index 1b24353..bbfcd59 100644 --- a/target-mips/lmi_helper.c +++ b/target-mips/lmi_helper.c @@ -18,7 +18,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" /* If the byte ordering doesn't matter, i.e. all columns are treated identically, then this union can be used directly. If byte ordering diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index 4edec6c..8af931a 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -20,7 +20,7 @@ #include "cpu.h" #include "qemu/host-utils.h" -#include "helper.h" +#include "exec/helper-proto.h" #if !defined(CONFIG_USER_ONLY) #include "exec/softmmu_exec.h" diff --git a/target-mips/translate.c b/target-mips/translate.c index 05f82d2..13cf29b 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -25,9 +25,8 @@ #include "disas/disas.h" #include "tcg-op.h" -#include "helper.h" -#define GEN_HELPER 1 -#include "helper.h" +#include "exec/helper-proto.h" +#include "exec/helper-gen.h" #define MIPS_DEBUG_DISAS 0 //#define MIPS_DEBUG_SIGN_EXTENSIONS diff --git a/target-moxie/helper.c b/target-moxie/helper.c index 3d0c34d..d1efded 100644 --- a/target-moxie/helper.c +++ b/target-moxie/helper.c @@ -27,7 +27,7 @@ #include "exec/exec-all.h" #include "exec/softmmu_exec.h" #include "qemu/host-utils.h" -#include "helper.h" +#include "exec/helper-proto.h" #define MMUSUFFIX _mmu diff --git a/target-moxie/helper.h b/target-moxie/helper.h index 3aa5549..d94ef7a 100644 --- a/target-moxie/helper.h +++ b/target-moxie/helper.h @@ -1,9 +1,5 @@ -#include "exec/def-helper.h" - DEF_HELPER_2(raise_exception, void, env, int) DEF_HELPER_1(debug, void, env) DEF_HELPER_FLAGS_3(div, TCG_CALL_NO_WG, i32, env, i32, i32) DEF_HELPER_FLAGS_3(udiv, TCG_CALL_NO_WG, i32, env, i32, i32) - -#include "exec/def-helper.h" diff --git a/target-moxie/translate.c b/target-moxie/translate.c index 63f889f..7f0dfb6 100644 --- a/target-moxie/translate.c +++ b/target-moxie/translate.c @@ -33,9 +33,8 @@ #include "disas/disas.h" #include "tcg-op.h" -#include "helper.h" -#define GEN_HELPER 1 -#include "helper.h" +#include "exec/helper-proto.h" +#include "exec/helper-gen.h" /* This is the state at translation time. */ typedef struct DisasContext { diff --git a/target-openrisc/exception_helper.c b/target-openrisc/exception_helper.c index 0c53b77..6093953 100644 --- a/target-openrisc/exception_helper.c +++ b/target-openrisc/exception_helper.c @@ -18,7 +18,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "exception.h" void HELPER(exception)(CPUOpenRISCState *env, uint32_t excp) diff --git a/target-openrisc/fpu_helper.c b/target-openrisc/fpu_helper.c index 4615a36..c94ed35 100644 --- a/target-openrisc/fpu_helper.c +++ b/target-openrisc/fpu_helper.c @@ -19,7 +19,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "exception.h" static inline uint32_t ieee_ex_to_openrisc(OpenRISCCPU *cpu, int fexcp) diff --git a/target-openrisc/helper.h b/target-openrisc/helper.h index 2af9790..f53fa21 100644 --- a/target-openrisc/helper.h +++ b/target-openrisc/helper.h @@ -17,8 +17,6 @@ * License along with this library; if not, see <http://www.gnu.org/licenses/>. */ -#include "exec/def-helper.h" - /* exception */ DEF_HELPER_FLAGS_2(exception, 0, void, env, i32) @@ -66,5 +64,3 @@ DEF_HELPER_FLAGS_1(rfe, 0, void, env) /* sys */ DEF_HELPER_FLAGS_4(mtspr, 0, void, env, tl, tl, tl) DEF_HELPER_FLAGS_4(mfspr, 0, tl, env, tl, tl, tl) - -#include "exec/def-helper.h" diff --git a/target-openrisc/int_helper.c b/target-openrisc/int_helper.c index 16cb5ab..6e27aeb 100644 --- a/target-openrisc/int_helper.c +++ b/target-openrisc/int_helper.c @@ -19,7 +19,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "exception.h" #include "qemu/host-utils.h" diff --git a/target-openrisc/interrupt_helper.c b/target-openrisc/interrupt_helper.c index 8194057..55a780c 100644 --- a/target-openrisc/interrupt_helper.c +++ b/target-openrisc/interrupt_helper.c @@ -19,7 +19,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" void HELPER(rfe)(CPUOpenRISCState *env) { diff --git a/target-openrisc/sys_helper.c b/target-openrisc/sys_helper.c index fedcbed..53ca6bc 100644 --- a/target-openrisc/sys_helper.c +++ b/target-openrisc/sys_helper.c @@ -19,7 +19,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #define TO_SPR(group, number) (((group) << 11) + (number)) diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c index 852b5e6..40084f9 100644 --- a/target-openrisc/translate.c +++ b/target-openrisc/translate.c @@ -27,9 +27,8 @@ #include "config.h" #include "qemu/bitops.h" -#include "helper.h" -#define GEN_HELPER 1 -#include "helper.h" +#include "exec/helper-proto.h" +#include "exec/helper-gen.h" #define OPENRISC_DISAS diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c index 4fa297d..a0c9fdc 100644 --- a/target-ppc/excp_helper.c +++ b/target-ppc/excp_helper.c @@ -17,7 +17,7 @@ * License along with this library; if not, see <http://www.gnu.org/licenses/>. */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "helper_regs.h" diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c index c6f484f..cd8f015 100644 --- a/target-ppc/fpu_helper.c +++ b/target-ppc/fpu_helper.c @@ -17,7 +17,7 @@ * License along with this library; if not, see <http://www.gnu.org/licenses/>. */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" /*****************************************************************************/ /* Floating point operations helpers */ diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 99f10de..08f3916 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -1,5 +1,3 @@ -#include "exec/def-helper.h" - DEF_HELPER_3(raise_exception_err, void, env, i32, i32) DEF_HELPER_2(raise_exception, void, env, i32) DEF_HELPER_4(tw, void, env, tl, tl, i32) @@ -613,5 +611,3 @@ DEF_HELPER_3(store_dbatu, void, env, i32, tl) DEF_HELPER_3(store_601_batl, void, env, i32, tl) DEF_HELPER_3(store_601_batu, void, env, i32, tl) #endif - -#include "exec/def-helper.h" diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c index 18b54f0..588f6a9 100644 --- a/target-ppc/int_helper.c +++ b/target-ppc/int_helper.c @@ -18,7 +18,7 @@ */ #include "cpu.h" #include "qemu/host-utils.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "helper_regs.h" /*****************************************************************************/ diff --git a/target-ppc/mem_helper.c b/target-ppc/mem_helper.c index f35ed03..d9c8c36 100644 --- a/target-ppc/mem_helper.c +++ b/target-ppc/mem_helper.c @@ -18,7 +18,7 @@ */ #include "cpu.h" #include "qemu/host-utils.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "helper_regs.h" diff --git a/target-ppc/misc_helper.c b/target-ppc/misc_helper.c index 2eb2fa6..7331b1b 100644 --- a/target-ppc/misc_helper.c +++ b/target-ppc/misc_helper.c @@ -17,7 +17,7 @@ * License along with this library; if not, see <http://www.gnu.org/licenses/>. */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "helper_regs.h" diff --git a/target-ppc/mmu-hash32.c b/target-ppc/mmu-hash32.c index 1cc1916..0a13a81 100644 --- a/target-ppc/mmu-hash32.c +++ b/target-ppc/mmu-hash32.c @@ -19,7 +19,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "sysemu/kvm.h" #include "kvm_ppc.h" #include "mmu-hash32.h" diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c index 1fefe58..c72198a 100644 --- a/target-ppc/mmu-hash64.c +++ b/target-ppc/mmu-hash64.c @@ -18,7 +18,7 @@ * License along with this library; if not, see <http://www.gnu.org/licenses/>. */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "sysemu/kvm.h" #include "kvm_ppc.h" #include "mmu-hash64.h" diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c index 1771863..a238bb2 100644 --- a/target-ppc/mmu_helper.c +++ b/target-ppc/mmu_helper.c @@ -17,7 +17,7 @@ * License along with this library; if not, see <http://www.gnu.org/licenses/>. */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "sysemu/kvm.h" #include "kvm_ppc.h" #include "mmu-hash64.h" diff --git a/target-ppc/timebase_helper.c b/target-ppc/timebase_helper.c index fad738a..865dcbe 100644 --- a/target-ppc/timebase_helper.c +++ b/target-ppc/timebase_helper.c @@ -17,7 +17,7 @@ * License along with this library; if not, see <http://www.gnu.org/licenses/>. */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" /*****************************************************************************/ /* SPR accesses */ diff --git a/target-ppc/translate.c b/target-ppc/translate.c index e3fcb03..6283b2c 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -23,9 +23,8 @@ #include "tcg-op.h" #include "qemu/host-utils.h" -#include "helper.h" -#define GEN_HELPER 1 -#include "helper.h" +#include "exec/helper-proto.h" +#include "exec/helper-gen.h" #define CPU_SINGLE_STEP 0x1 #define CPU_BRANCH_STEP 0x2 diff --git a/target-s390x/cc_helper.c b/target-s390x/cc_helper.c index 9e676a5..373eb17 100644 --- a/target-s390x/cc_helper.c +++ b/target-s390x/cc_helper.c @@ -19,7 +19,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "qemu/host-utils.h" /* #define DEBUG_HELPER */ diff --git a/target-s390x/fpu_helper.c b/target-s390x/fpu_helper.c index 3e9c7b2..d879ad6 100644 --- a/target-s390x/fpu_helper.c +++ b/target-s390x/fpu_helper.c @@ -19,7 +19,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #if !defined(CONFIG_USER_ONLY) #include "exec/softmmu_exec.h" diff --git a/target-s390x/helper.h b/target-s390x/helper.h index 0d80aa0..faebfd9 100644 --- a/target-s390x/helper.h +++ b/target-s390x/helper.h @@ -1,5 +1,3 @@ -#include "exec/def-helper.h" - DEF_HELPER_2(exception, noreturn, env, i32) DEF_HELPER_FLAGS_4(nc, TCG_CALL_NO_WG, i32, env, i32, i64, i64) DEF_HELPER_FLAGS_4(oc, TCG_CALL_NO_WG, i32, env, i32, i64, i64) @@ -115,5 +113,3 @@ DEF_HELPER_FLAGS_1(ptlb, TCG_CALL_NO_RWG, void, env) DEF_HELPER_2(lra, i64, env, i64) DEF_HELPER_FLAGS_3(stura, TCG_CALL_NO_WG, void, env, i64, i64) #endif - -#include "exec/def-helper.h" diff --git a/target-s390x/int_helper.c b/target-s390x/int_helper.c index 6a929ca..cb8dd98 100644 --- a/target-s390x/int_helper.c +++ b/target-s390x/int_helper.c @@ -20,7 +20,7 @@ #include "cpu.h" #include "qemu/host-utils.h" -#include "helper.h" +#include "exec/helper-proto.h" /* #define DEBUG_HELPER */ #ifdef DEBUG_HELPER diff --git a/target-s390x/mem_helper.c b/target-s390x/mem_helper.c index d8ca300..5a29841 100644 --- a/target-s390x/mem_helper.c +++ b/target-s390x/mem_helper.c @@ -19,7 +19,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" /*****************************************************************************/ /* Softmmu support */ diff --git a/target-s390x/misc_helper.c b/target-s390x/misc_helper.c index cdbbb79..44c08f3 100644 --- a/target-s390x/misc_helper.c +++ b/target-s390x/misc_helper.c @@ -21,7 +21,7 @@ #include "cpu.h" #include "exec/memory.h" #include "qemu/host-utils.h" -#include "helper.h" +#include "exec/helper-proto.h" #include <string.h> #include "sysemu/kvm.h" #include "qemu/timer.h" diff --git a/target-s390x/translate.c b/target-s390x/translate.c index 81b7e33..cf65f01 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -38,9 +38,8 @@ static TCGv_ptr cpu_env; #include "exec/gen-icount.h" -#include "helper.h" -#define GEN_HELPER 1 -#include "helper.h" +#include "exec/helper-proto.h" +#include "exec/helper-gen.h" /* Information that (most) every instruction needs to manipulate. */ diff --git a/target-sh4/helper.h b/target-sh4/helper.h index 7162448..3b5c436 100644 --- a/target-sh4/helper.h +++ b/target-sh4/helper.h @@ -1,5 +1,3 @@ -#include "exec/def-helper.h" - DEF_HELPER_1(ldtlb, void, env) DEF_HELPER_1(raise_illegal_instruction, noreturn, env) DEF_HELPER_1(raise_slot_illegal_instruction, noreturn, env) @@ -46,5 +44,3 @@ DEF_HELPER_2(ftrc_FT, i32, env, f32) DEF_HELPER_2(ftrc_DT, i32, env, f64) DEF_HELPER_3(fipr, void, env, i32, i32) DEF_HELPER_2(ftrv, void, env, i32) - -#include "exec/def-helper.h" diff --git a/target-sh4/op_helper.c b/target-sh4/op_helper.c index 720a97b..39e1e7c 100644 --- a/target-sh4/op_helper.c +++ b/target-sh4/op_helper.c @@ -19,7 +19,7 @@ #include <assert.h> #include <stdlib.h> #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #ifndef CONFIG_USER_ONLY #include "exec/softmmu_exec.h" diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 2360609..169c87f 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -24,9 +24,8 @@ #include "disas/disas.h" #include "tcg-op.h" -#include "helper.h" -#define GEN_HELPER 1 -#include "helper.h" +#include "exec/helper-proto.h" +#include "exec/helper-gen.h" typedef struct DisasContext { struct TranslationBlock *tb; diff --git a/target-sparc/cc_helper.c b/target-sparc/cc_helper.c index 63bab07..35dab73 100644 --- a/target-sparc/cc_helper.c +++ b/target-sparc/cc_helper.c @@ -18,7 +18,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" static uint32_t compute_all_flags(CPUSPARCState *env) { diff --git a/target-sparc/fop_helper.c b/target-sparc/fop_helper.c index f4b62a5..ee4592e 100644 --- a/target-sparc/fop_helper.c +++ b/target-sparc/fop_helper.c @@ -18,7 +18,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #define QT0 (env->qt0) #define QT1 (env->qt1) diff --git a/target-sparc/helper.c b/target-sparc/helper.c index ae7740b..4850c7c 100644 --- a/target-sparc/helper.c +++ b/target-sparc/helper.c @@ -19,7 +19,7 @@ #include "cpu.h" #include "qemu/host-utils.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "sysemu/sysemu.h" void helper_raise_exception(CPUSPARCState *env, int tt) diff --git a/target-sparc/helper.h b/target-sparc/helper.h index cd8d3fa..1ad23e8 100644 --- a/target-sparc/helper.h +++ b/target-sparc/helper.h @@ -1,5 +1,3 @@ -#include "exec/def-helper.h" - #ifndef TARGET_SPARC64 DEF_HELPER_1(rett, void, env) DEF_HELPER_2(wrpsr, void, env, tl) @@ -175,5 +173,3 @@ VIS_CMPHELPER(cmpne) #undef VIS_CMPHELPER DEF_HELPER_1(compute_psr, void, env) DEF_HELPER_1(compute_C_icc, i32, env) - -#include "exec/def-helper.h" diff --git a/target-sparc/int64_helper.c b/target-sparc/int64_helper.c index bf24232..b02d22b 100644 --- a/target-sparc/int64_helper.c +++ b/target-sparc/int64_helper.c @@ -18,7 +18,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "trace.h" #define DEBUG_PCALL diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c index ec14802..b6b9866 100644 --- a/target-sparc/ldst_helper.c +++ b/target-sparc/ldst_helper.c @@ -18,7 +18,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" //#define DEBUG_MMU //#define DEBUG_MXCC diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 2de1c4a..652a181 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -26,11 +26,10 @@ #include "cpu.h" #include "disas/disas.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "tcg-op.h" -#define GEN_HELPER 1 -#include "helper.h" +#include "exec/helper-gen.h" #define DEBUG_DISAS diff --git a/target-sparc/vis_helper.c b/target-sparc/vis_helper.c index 9d2edb0..383cc8b 100644 --- a/target-sparc/vis_helper.c +++ b/target-sparc/vis_helper.c @@ -18,7 +18,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" /* This function uses non-native bit order */ #define GET_FIELD(X, FROM, TO) \ diff --git a/target-sparc/win_helper.c b/target-sparc/win_helper.c index 3e82eb7..f01ae08 100644 --- a/target-sparc/win_helper.c +++ b/target-sparc/win_helper.c @@ -18,7 +18,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "trace.h" static inline void memcpy32(target_ulong *dst, const target_ulong *src) diff --git a/target-unicore32/helper.c b/target-unicore32/helper.c index 169c85c..e5ebbf4 100644 --- a/target-unicore32/helper.c +++ b/target-unicore32/helper.c @@ -11,7 +11,7 @@ #include "cpu.h" #include "exec/gdbstub.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "qemu/host-utils.h" #ifndef CONFIG_USER_ONLY #include "ui/console.h" diff --git a/target-unicore32/helper.h b/target-unicore32/helper.h index e85ce6c..9418137 100644 --- a/target-unicore32/helper.h +++ b/target-unicore32/helper.h @@ -6,7 +6,6 @@ * published by the Free Software Foundation, or (at your option) any * later version. See the COPYING file in the top-level directory. */ -#include "exec/def-helper.h" #ifndef CONFIG_USER_ONLY DEF_HELPER_4(cp0_set, void, env, i32, i32, i32) @@ -64,5 +63,3 @@ DEF_HELPER_2(ucf64_si2df, f64, f32, env) DEF_HELPER_2(ucf64_sf2si, f32, f32, env) DEF_HELPER_2(ucf64_df2si, f32, f64, env) - -#include "exec/def-helper.h" diff --git a/target-unicore32/op_helper.c b/target-unicore32/op_helper.c index 4c6950d..4f96ed3 100644 --- a/target-unicore32/op_helper.c +++ b/target-unicore32/op_helper.c @@ -9,7 +9,7 @@ * later version. See the COPYING file in the top-level directory. */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #define SIGNBIT (uint32_t)0x80000000 #define SIGNBIT64 ((uint64_t)1 << 63) diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c index c2402cf..3cccafe 100644 --- a/target-unicore32/translate.c +++ b/target-unicore32/translate.c @@ -19,9 +19,8 @@ #include "tcg-op.h" #include "qemu/log.h" -#include "helper.h" -#define GEN_HELPER 1 -#include "helper.h" +#include "exec/helper-proto.h" +#include "exec/helper-gen.h" /* internal defines */ typedef struct DisasContext { diff --git a/target-unicore32/ucf64_helper.c b/target-unicore32/ucf64_helper.c index 34fa2a5..0c7ea26 100644 --- a/target-unicore32/ucf64_helper.c +++ b/target-unicore32/ucf64_helper.c @@ -9,7 +9,7 @@ * See the COPYING file in the top-level directory. */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" /* * The convention used for UniCore-F64 instructions: diff --git a/target-xtensa/helper.h b/target-xtensa/helper.h index 322b04c..ed3af0b 100644 --- a/target-xtensa/helper.h +++ b/target-xtensa/helper.h @@ -1,5 +1,3 @@ -#include "exec/def-helper.h" - DEF_HELPER_2(exception, noreturn, env, i32) DEF_HELPER_3(exception_cause, noreturn, env, i32, i32) DEF_HELPER_4(exception_cause_vaddr, noreturn, env, i32, i32, i32) @@ -58,5 +56,3 @@ DEF_HELPER_4(olt_s, void, env, i32, f32, f32) DEF_HELPER_4(ult_s, void, env, i32, f32, f32) DEF_HELPER_4(ole_s, void, env, i32, f32, f32) DEF_HELPER_4(ule_s, void, env, i32, f32, f32) - -#include "exec/def-helper.h" diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c index b531019..01edab4 100644 --- a/target-xtensa/op_helper.c +++ b/target-xtensa/op_helper.c @@ -26,7 +26,7 @@ */ #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "qemu/host-utils.h" #include "exec/softmmu_exec.h" #include "exec/address-spaces.h" diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index dda105d..57e56bd 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c @@ -37,9 +37,8 @@ #include "qemu/log.h" #include "sysemu/sysemu.h" -#include "helper.h" -#define GEN_HELPER 1 -#include "helper.h" +#include "exec/helper-proto.h" +#include "exec/helper-gen.h" typedef struct DisasContext { const XtensaConfig *config; diff --git a/target-xtensa/xtensa-semi.c b/target-xtensa/xtensa-semi.c index 424253d..16e9d8c 100644 --- a/target-xtensa/xtensa-semi.c +++ b/target-xtensa/xtensa-semi.c @@ -30,7 +30,7 @@ #include <string.h> #include <stddef.h> #include "cpu.h" -#include "helper.h" +#include "exec/helper-proto.h" #include "qemu/log.h" enum { diff --git a/tcg-runtime.c b/tcg-runtime.c index 4b66e51..9daba69 100644 --- a/tcg-runtime.c +++ b/tcg-runtime.c @@ -23,75 +23,85 @@ */ #include <stdint.h> #include "qemu/host-utils.h" -#include "tcg/tcg-runtime.h" + +/* This file is compiled once, and thus we can't include the standard + "exec/helper-proto.h", which has includes that are target specific. */ + +#include "exec/helper-head.h" + +#define DEF_HELPER_FLAGS_2(name, flags, ret, t1, t2) \ + dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2)); + +#include "tcg-runtime.h" + /* 32-bit helpers */ -int32_t tcg_helper_div_i32(int32_t arg1, int32_t arg2) +int32_t HELPER(div_i32)(int32_t arg1, int32_t arg2) { return arg1 / arg2; } -int32_t tcg_helper_rem_i32(int32_t arg1, int32_t arg2) +int32_t HELPER(rem_i32)(int32_t arg1, int32_t arg2) { return arg1 % arg2; } -uint32_t tcg_helper_divu_i32(uint32_t arg1, uint32_t arg2) +uint32_t HELPER(divu_i32)(uint32_t arg1, uint32_t arg2) { return arg1 / arg2; } -uint32_t tcg_helper_remu_i32(uint32_t arg1, uint32_t arg2) +uint32_t HELPER(remu_i32)(uint32_t arg1, uint32_t arg2) { return arg1 % arg2; } /* 64-bit helpers */ -int64_t tcg_helper_shl_i64(int64_t arg1, int64_t arg2) +uint64_t HELPER(shl_i64)(uint64_t arg1, uint64_t arg2) { return arg1 << arg2; } -int64_t tcg_helper_shr_i64(int64_t arg1, int64_t arg2) +uint64_t HELPER(shr_i64)(uint64_t arg1, uint64_t arg2) { - return (uint64_t)arg1 >> arg2; + return arg1 >> arg2; } -int64_t tcg_helper_sar_i64(int64_t arg1, int64_t arg2) +int64_t HELPER(sar_i64)(int64_t arg1, int64_t arg2) { return arg1 >> arg2; } -int64_t tcg_helper_div_i64(int64_t arg1, int64_t arg2) +int64_t HELPER(div_i64)(int64_t arg1, int64_t arg2) { return arg1 / arg2; } -int64_t tcg_helper_rem_i64(int64_t arg1, int64_t arg2) +int64_t HELPER(rem_i64)(int64_t arg1, int64_t arg2) { return arg1 % arg2; } -uint64_t tcg_helper_divu_i64(uint64_t arg1, uint64_t arg2) +uint64_t HELPER(divu_i64)(uint64_t arg1, uint64_t arg2) { return arg1 / arg2; } -uint64_t tcg_helper_remu_i64(uint64_t arg1, uint64_t arg2) +uint64_t HELPER(remu_i64)(uint64_t arg1, uint64_t arg2) { return arg1 % arg2; } -uint64_t tcg_helper_muluh_i64(uint64_t arg1, uint64_t arg2) +uint64_t HELPER(muluh_i64)(uint64_t arg1, uint64_t arg2) { uint64_t l, h; mulu64(&l, &h, arg1, arg2); return h; } -int64_t tcg_helper_mulsh_i64(int64_t arg1, int64_t arg2) +int64_t HELPER(mulsh_i64)(int64_t arg1, int64_t arg2) { uint64_t l, h; muls64(&l, &h, arg1, arg2); diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c index 77bb6d9..56dae66 100644 --- a/tcg/aarch64/tcg-target.c +++ b/tcg/aarch64/tcg-target.c @@ -1809,24 +1809,23 @@ static void tcg_target_qemu_prologue(TCGContext *s) } typedef struct { - DebugFrameCIE cie; - DebugFrameFDEHeader fde; + DebugFrameHeader h; uint8_t fde_def_cfa[4]; uint8_t fde_reg_ofs[24]; } DebugFrame; #define ELF_HOST_MACHINE EM_AARCH64 -static DebugFrame debug_frame = { - .cie.len = sizeof(DebugFrameCIE)-4, /* length after .len member */ - .cie.id = -1, - .cie.version = 1, - .cie.code_align = 1, - .cie.data_align = 0x78, /* sleb128 -8 */ - .cie.return_column = TCG_REG_LR, +static const DebugFrame debug_frame = { + .h.cie.len = sizeof(DebugFrameCIE)-4, /* length after .len member */ + .h.cie.id = -1, + .h.cie.version = 1, + .h.cie.code_align = 1, + .h.cie.data_align = 0x78, /* sleb128 -8 */ + .h.cie.return_column = TCG_REG_LR, /* Total FDE size does not include the "len" member. */ - .fde.len = sizeof(DebugFrame) - offsetof(DebugFrame, fde.cie_offset), + .h.fde.len = sizeof(DebugFrame) - offsetof(DebugFrame, h.fde.cie_offset), .fde_def_cfa = { 12, TCG_REG_SP, /* DW_CFA_def_cfa sp, ... */ @@ -1851,8 +1850,5 @@ static DebugFrame debug_frame = { void tcg_register_jit(void *buf, size_t buf_size) { - debug_frame.fde.func_start = (intptr_t)buf; - debug_frame.fde.func_len = buf_size; - tcg_register_jit_int(buf, buf_size, &debug_frame, sizeof(debug_frame)); } diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index 538ca2a..e40301c 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-target.c @@ -2077,8 +2077,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) } typedef struct { - DebugFrameCIE cie; - DebugFrameFDEHeader fde; + DebugFrameHeader h; uint8_t fde_def_cfa[4]; uint8_t fde_reg_ofs[18]; } DebugFrame; @@ -2088,16 +2087,16 @@ typedef struct { /* We're expecting a 2 byte uleb128 encoded value. */ QEMU_BUILD_BUG_ON(FRAME_SIZE >= (1 << 14)); -static DebugFrame debug_frame = { - .cie.len = sizeof(DebugFrameCIE)-4, /* length after .len member */ - .cie.id = -1, - .cie.version = 1, - .cie.code_align = 1, - .cie.data_align = 0x7c, /* sleb128 -4 */ - .cie.return_column = 14, +static const DebugFrame debug_frame = { + .h.cie.len = sizeof(DebugFrameCIE)-4, /* length after .len member */ + .h.cie.id = -1, + .h.cie.version = 1, + .h.cie.code_align = 1, + .h.cie.data_align = 0x7c, /* sleb128 -4 */ + .h.cie.return_column = 14, /* Total FDE size does not include the "len" member. */ - .fde.len = sizeof(DebugFrame) - offsetof(DebugFrame, fde.cie_offset), + .h.fde.len = sizeof(DebugFrame) - offsetof(DebugFrame, h.fde.cie_offset), .fde_def_cfa = { 12, 13, /* DW_CFA_def_cfa sp, ... */ @@ -2120,8 +2119,5 @@ static DebugFrame debug_frame = { void tcg_register_jit(void *buf, size_t buf_size) { - debug_frame.fde.func_start = (tcg_target_long) buf; - debug_frame.fde.func_len = buf_size; - tcg_register_jit_int(buf, buf_size, &debug_frame, sizeof(debug_frame)); } diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c index a373073..d910233 100644 --- a/tcg/i386/tcg-target.c +++ b/tcg/i386/tcg-target.c @@ -2341,8 +2341,7 @@ static void tcg_target_init(TCGContext *s) } typedef struct { - DebugFrameCIE cie; - DebugFrameFDEHeader fde; + DebugFrameHeader h; uint8_t fde_def_cfa[4]; uint8_t fde_reg_ofs[14]; } DebugFrame; @@ -2354,16 +2353,16 @@ QEMU_BUILD_BUG_ON(FRAME_SIZE >= (1 << 14)); /* Host machine without ELF. */ #elif TCG_TARGET_REG_BITS == 64 #define ELF_HOST_MACHINE EM_X86_64 -static DebugFrame debug_frame = { - .cie.len = sizeof(DebugFrameCIE)-4, /* length after .len member */ - .cie.id = -1, - .cie.version = 1, - .cie.code_align = 1, - .cie.data_align = 0x78, /* sleb128 -8 */ - .cie.return_column = 16, +static const DebugFrame debug_frame = { + .h.cie.len = sizeof(DebugFrameCIE)-4, /* length after .len member */ + .h.cie.id = -1, + .h.cie.version = 1, + .h.cie.code_align = 1, + .h.cie.data_align = 0x78, /* sleb128 -8 */ + .h.cie.return_column = 16, /* Total FDE size does not include the "len" member. */ - .fde.len = sizeof(DebugFrame) - offsetof(DebugFrame, fde.cie_offset), + .h.fde.len = sizeof(DebugFrame) - offsetof(DebugFrame, h.fde.cie_offset), .fde_def_cfa = { 12, 7, /* DW_CFA_def_cfa %rsp, ... */ @@ -2383,16 +2382,16 @@ static DebugFrame debug_frame = { }; #else #define ELF_HOST_MACHINE EM_386 -static DebugFrame debug_frame = { - .cie.len = sizeof(DebugFrameCIE)-4, /* length after .len member */ - .cie.id = -1, - .cie.version = 1, - .cie.code_align = 1, - .cie.data_align = 0x7c, /* sleb128 -4 */ - .cie.return_column = 8, +static const DebugFrame debug_frame = { + .h.cie.len = sizeof(DebugFrameCIE)-4, /* length after .len member */ + .h.cie.id = -1, + .h.cie.version = 1, + .h.cie.code_align = 1, + .h.cie.data_align = 0x7c, /* sleb128 -4 */ + .h.cie.return_column = 8, /* Total FDE size does not include the "len" member. */ - .fde.len = sizeof(DebugFrame) - offsetof(DebugFrame, fde.cie_offset), + .h.fde.len = sizeof(DebugFrame) - offsetof(DebugFrame, h.fde.cie_offset), .fde_def_cfa = { 12, 4, /* DW_CFA_def_cfa %esp, ... */ @@ -2413,9 +2412,6 @@ static DebugFrame debug_frame = { #if defined(ELF_HOST_MACHINE) void tcg_register_jit(void *buf, size_t buf_size) { - debug_frame.fde.func_start = (uintptr_t)buf; - debug_frame.fde.func_len = buf_size; - tcg_register_jit_int(buf, buf_size, &debug_frame, sizeof(debug_frame)); } #endif diff --git a/tcg/optimize.c b/tcg/optimize.c index 3a504a1..77da2f9 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -83,6 +83,20 @@ static int op_bits(TCGOpcode op) return def->flags & TCG_OPF_64BIT ? 64 : 32; } +static TCGOpcode op_to_mov(TCGOpcode op) +{ + switch (op_bits(op)) { + case 32: + return INDEX_op_mov_i32; + case 64: + return INDEX_op_mov_i64; + default: + fprintf(stderr, "op_to_mov: unexpected return value of " + "function op_bits.\n"); + tcg_abort(); + } +} + static TCGOpcode op_to_movi(TCGOpcode op) { switch (op_bits(op)) { @@ -148,11 +162,22 @@ static bool temps_are_copies(TCGArg arg1, TCGArg arg2) return false; } -static void tcg_opt_gen_mov(TCGContext *s, TCGArg *gen_args, - TCGArg dst, TCGArg src) +static void tcg_opt_gen_mov(TCGContext *s, int op_index, TCGArg *gen_args, + TCGOpcode old_op, TCGArg dst, TCGArg src) { + TCGOpcode new_op = op_to_mov(old_op); + tcg_target_ulong mask; + + s->gen_opc_buf[op_index] = new_op; + reset_temp(dst); - temps[dst].mask = temps[src].mask; + mask = temps[src].mask; + if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) { + /* High bits of the destination are now garbage. */ + mask |= ~0xffffffffull; + } + temps[dst].mask = mask; + assert(temps[src].state != TCG_TEMP_CONST); if (s->temps[src].type == s->temps[dst].type) { @@ -172,30 +197,28 @@ static void tcg_opt_gen_mov(TCGContext *s, TCGArg *gen_args, gen_args[1] = src; } -static void tcg_opt_gen_movi(TCGArg *gen_args, TCGArg dst, TCGArg val) +static void tcg_opt_gen_movi(TCGContext *s, int op_index, TCGArg *gen_args, + TCGOpcode old_op, TCGArg dst, TCGArg val) { + TCGOpcode new_op = op_to_movi(old_op); + tcg_target_ulong mask; + + s->gen_opc_buf[op_index] = new_op; + reset_temp(dst); temps[dst].state = TCG_TEMP_CONST; temps[dst].val = val; - temps[dst].mask = val; + mask = val; + if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) { + /* High bits of the destination are now garbage. */ + mask |= ~0xffffffffull; + } + temps[dst].mask = mask; + gen_args[0] = dst; gen_args[1] = val; } -static TCGOpcode op_to_mov(TCGOpcode op) -{ - switch (op_bits(op)) { - case 32: - return INDEX_op_mov_i32; - case 64: - return INDEX_op_mov_i64; - default: - fprintf(stderr, "op_to_mov: unexpected return value of " - "function op_bits.\n"); - tcg_abort(); - } -} - static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y) { uint64_t l64, h64; @@ -530,7 +553,7 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, for (op_index = 0; op_index < nb_ops; op_index++) { TCGOpcode op = s->gen_opc_buf[op_index]; const TCGOpDef *def = &tcg_op_defs[op]; - tcg_target_ulong mask, affected; + tcg_target_ulong mask, partmask, affected; int nb_oargs, nb_iargs, nb_args, i; TCGArg tmp; @@ -619,8 +642,7 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, CASE_OP_32_64(rotr): if (temps[args[1]].state == TCG_TEMP_CONST && temps[args[1]].val == 0) { - s->gen_opc_buf[op_index] = op_to_movi(op); - tcg_opt_gen_movi(gen_args, args[0], 0); + tcg_opt_gen_movi(s, op_index, gen_args, op, args[0], 0); args += 3; gen_args += 2; continue; @@ -749,8 +771,7 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, if (temps_are_copies(args[0], args[1])) { s->gen_opc_buf[op_index] = INDEX_op_nop; } else { - s->gen_opc_buf[op_index] = op_to_mov(op); - tcg_opt_gen_mov(s, gen_args, args[0], args[1]); + tcg_opt_gen_mov(s, op_index, gen_args, op, args[0], args[1]); gen_args += 2; } args += 3; @@ -859,6 +880,7 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, break; CASE_OP_32_64(setcond): + case INDEX_op_setcond2_i32: mask = 1; break; @@ -894,16 +916,20 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, break; } - /* 32-bit ops (non 64-bit ops and non load/store ops) generate 32-bit - results */ + /* 32-bit ops (non 64-bit ops and non load/store ops) generate + 32-bit results. For the result is zero test below, we can + ignore high bits, but for further optimizations we need to + record that the high bits contain garbage. */ + partmask = mask; if (!(def->flags & (TCG_OPF_CALL_CLOBBER | TCG_OPF_64BIT))) { - mask &= 0xffffffffu; + mask |= ~(tcg_target_ulong)0xffffffffu; + partmask &= 0xffffffffu; + affected &= 0xffffffffu; } - if (mask == 0) { + if (partmask == 0) { assert(nb_oargs == 1); - s->gen_opc_buf[op_index] = op_to_movi(op); - tcg_opt_gen_movi(gen_args, args[0], 0); + tcg_opt_gen_movi(s, op_index, gen_args, op, args[0], 0); args += nb_args; gen_args += 2; continue; @@ -913,12 +939,11 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, if (temps_are_copies(args[0], args[1])) { s->gen_opc_buf[op_index] = INDEX_op_nop; } else if (temps[args[1]].state != TCG_TEMP_CONST) { - s->gen_opc_buf[op_index] = op_to_mov(op); - tcg_opt_gen_mov(s, gen_args, args[0], args[1]); + tcg_opt_gen_mov(s, op_index, gen_args, op, args[0], args[1]); gen_args += 2; } else { - s->gen_opc_buf[op_index] = op_to_movi(op); - tcg_opt_gen_movi(gen_args, args[0], temps[args[1]].val); + tcg_opt_gen_movi(s, op_index, gen_args, op, + args[0], temps[args[1]].val); gen_args += 2; } args += nb_args; @@ -933,8 +958,7 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, CASE_OP_32_64(mulsh): if ((temps[args[2]].state == TCG_TEMP_CONST && temps[args[2]].val == 0)) { - s->gen_opc_buf[op_index] = op_to_movi(op); - tcg_opt_gen_movi(gen_args, args[0], 0); + tcg_opt_gen_movi(s, op_index, gen_args, op, args[0], 0); args += 3; gen_args += 2; continue; @@ -952,8 +976,8 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, if (temps_are_copies(args[0], args[1])) { s->gen_opc_buf[op_index] = INDEX_op_nop; } else { - s->gen_opc_buf[op_index] = op_to_mov(op); - tcg_opt_gen_mov(s, gen_args, args[0], args[1]); + tcg_opt_gen_mov(s, op_index, gen_args, op, + args[0], args[1]); gen_args += 2; } args += 3; @@ -970,8 +994,7 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, CASE_OP_32_64(sub): CASE_OP_32_64(xor): if (temps_are_copies(args[1], args[2])) { - s->gen_opc_buf[op_index] = op_to_movi(op); - tcg_opt_gen_movi(gen_args, args[0], 0); + tcg_opt_gen_movi(s, op_index, gen_args, op, args[0], 0); gen_args += 2; args += 3; continue; @@ -992,19 +1015,17 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, break; } if (temps[args[1]].state != TCG_TEMP_CONST) { - tcg_opt_gen_mov(s, gen_args, args[0], args[1]); + tcg_opt_gen_mov(s, op_index, gen_args, op, args[0], args[1]); gen_args += 2; args += 2; break; } /* Source argument is constant. Rewrite the operation and let movi case handle it. */ - op = op_to_movi(op); - s->gen_opc_buf[op_index] = op; args[1] = temps[args[1]].val; /* fallthrough */ CASE_OP_32_64(movi): - tcg_opt_gen_movi(gen_args, args[0], args[1]); + tcg_opt_gen_movi(s, op_index, gen_args, op, args[0], args[1]); gen_args += 2; args += 2; break; @@ -1018,9 +1039,8 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, case INDEX_op_ext32s_i64: case INDEX_op_ext32u_i64: if (temps[args[1]].state == TCG_TEMP_CONST) { - s->gen_opc_buf[op_index] = op_to_movi(op); tmp = do_constant_folding(op, temps[args[1]].val, 0); - tcg_opt_gen_movi(gen_args, args[0], tmp); + tcg_opt_gen_movi(s, op_index, gen_args, op, args[0], tmp); gen_args += 2; args += 2; break; @@ -1029,9 +1049,8 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, case INDEX_op_trunc_shr_i32: if (temps[args[1]].state == TCG_TEMP_CONST) { - s->gen_opc_buf[op_index] = op_to_movi(op); tmp = do_constant_folding(op, temps[args[1]].val, args[2]); - tcg_opt_gen_movi(gen_args, args[0], tmp); + tcg_opt_gen_movi(s, op_index, gen_args, op, args[0], tmp); gen_args += 2; args += 3; break; @@ -1062,10 +1081,9 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, CASE_OP_32_64(remu): if (temps[args[1]].state == TCG_TEMP_CONST && temps[args[2]].state == TCG_TEMP_CONST) { - s->gen_opc_buf[op_index] = op_to_movi(op); tmp = do_constant_folding(op, temps[args[1]].val, temps[args[2]].val); - tcg_opt_gen_movi(gen_args, args[0], tmp); + tcg_opt_gen_movi(s, op_index, gen_args, op, args[0], tmp); gen_args += 2; args += 3; break; @@ -1075,10 +1093,9 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, CASE_OP_32_64(deposit): if (temps[args[1]].state == TCG_TEMP_CONST && temps[args[2]].state == TCG_TEMP_CONST) { - s->gen_opc_buf[op_index] = op_to_movi(op); tmp = deposit64(temps[args[1]].val, args[3], args[4], temps[args[2]].val); - tcg_opt_gen_movi(gen_args, args[0], tmp); + tcg_opt_gen_movi(s, op_index, gen_args, op, args[0], tmp); gen_args += 2; args += 5; break; @@ -1088,8 +1105,7 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, CASE_OP_32_64(setcond): tmp = do_constant_folding_cond(op, args[1], args[2], args[3]); if (tmp != 2) { - s->gen_opc_buf[op_index] = op_to_movi(op); - tcg_opt_gen_movi(gen_args, args[0], tmp); + tcg_opt_gen_movi(s, op_index, gen_args, op, args[0], tmp); gen_args += 2; args += 4; break; @@ -1118,12 +1134,12 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, if (temps_are_copies(args[0], args[4-tmp])) { s->gen_opc_buf[op_index] = INDEX_op_nop; } else if (temps[args[4-tmp]].state == TCG_TEMP_CONST) { - s->gen_opc_buf[op_index] = op_to_movi(op); - tcg_opt_gen_movi(gen_args, args[0], temps[args[4-tmp]].val); + tcg_opt_gen_movi(s, op_index, gen_args, op, + args[0], temps[args[4-tmp]].val); gen_args += 2; } else { - s->gen_opc_buf[op_index] = op_to_mov(op); - tcg_opt_gen_mov(s, gen_args, args[0], args[4-tmp]); + tcg_opt_gen_mov(s, op_index, gen_args, op, + args[0], args[4-tmp]); gen_args += 2; } args += 6; @@ -1156,10 +1172,10 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, rl = args[0]; rh = args[1]; - s->gen_opc_buf[op_index] = INDEX_op_movi_i32; - s->gen_opc_buf[++op_index] = INDEX_op_movi_i32; - tcg_opt_gen_movi(&gen_args[0], rl, (uint32_t)a); - tcg_opt_gen_movi(&gen_args[2], rh, (uint32_t)(a >> 32)); + tcg_opt_gen_movi(s, op_index, &gen_args[0], + op, rl, (uint32_t)a); + tcg_opt_gen_movi(s, ++op_index, &gen_args[2], + op, rh, (uint32_t)(a >> 32)); gen_args += 4; args += 6; break; @@ -1179,10 +1195,10 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, rl = args[0]; rh = args[1]; - s->gen_opc_buf[op_index] = INDEX_op_movi_i32; - s->gen_opc_buf[++op_index] = INDEX_op_movi_i32; - tcg_opt_gen_movi(&gen_args[0], rl, (uint32_t)r); - tcg_opt_gen_movi(&gen_args[2], rh, (uint32_t)(r >> 32)); + tcg_opt_gen_movi(s, op_index, &gen_args[0], + op, rl, (uint32_t)r); + tcg_opt_gen_movi(s, ++op_index, &gen_args[2], + op, rh, (uint32_t)(r >> 32)); gen_args += 4; args += 4; break; @@ -1193,11 +1209,13 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, tmp = do_constant_folding_cond2(&args[0], &args[2], args[4]); if (tmp != 2) { if (tmp) { + do_brcond_true: reset_all_temps(nb_temps); s->gen_opc_buf[op_index] = INDEX_op_br; gen_args[0] = args[5]; gen_args += 1; } else { + do_brcond_false: s->gen_opc_buf[op_index] = INDEX_op_nop; } } else if ((args[4] == TCG_COND_LT || args[4] == TCG_COND_GE) @@ -1207,6 +1225,7 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, && temps[args[3]].val == 0) { /* Simplify LT/GE comparisons vs zero to a single compare vs the high word of the input. */ + do_brcond_high: reset_all_temps(nb_temps); s->gen_opc_buf[op_index] = INDEX_op_brcond_i32; gen_args[0] = args[1]; @@ -1214,6 +1233,49 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, gen_args[2] = args[4]; gen_args[3] = args[5]; gen_args += 4; + } else if (args[4] == TCG_COND_EQ) { + /* Simplify EQ comparisons where one of the pairs + can be simplified. */ + tmp = do_constant_folding_cond(INDEX_op_brcond_i32, + args[0], args[2], TCG_COND_EQ); + if (tmp == 0) { + goto do_brcond_false; + } else if (tmp == 1) { + goto do_brcond_high; + } + tmp = do_constant_folding_cond(INDEX_op_brcond_i32, + args[1], args[3], TCG_COND_EQ); + if (tmp == 0) { + goto do_brcond_false; + } else if (tmp != 1) { + goto do_default; + } + do_brcond_low: + reset_all_temps(nb_temps); + s->gen_opc_buf[op_index] = INDEX_op_brcond_i32; + gen_args[0] = args[0]; + gen_args[1] = args[2]; + gen_args[2] = args[4]; + gen_args[3] = args[5]; + gen_args += 4; + } else if (args[4] == TCG_COND_NE) { + /* Simplify NE comparisons where one of the pairs + can be simplified. */ + tmp = do_constant_folding_cond(INDEX_op_brcond_i32, + args[0], args[2], TCG_COND_NE); + if (tmp == 0) { + goto do_brcond_high; + } else if (tmp == 1) { + goto do_brcond_true; + } + tmp = do_constant_folding_cond(INDEX_op_brcond_i32, + args[1], args[3], TCG_COND_NE); + if (tmp == 0) { + goto do_brcond_low; + } else if (tmp == 1) { + goto do_brcond_true; + } + goto do_default; } else { goto do_default; } @@ -1223,8 +1285,8 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, case INDEX_op_setcond2_i32: tmp = do_constant_folding_cond2(&args[1], &args[3], args[5]); if (tmp != 2) { - s->gen_opc_buf[op_index] = INDEX_op_movi_i32; - tcg_opt_gen_movi(gen_args, args[0], tmp); + do_setcond_const: + tcg_opt_gen_movi(s, op_index, gen_args, op, args[0], tmp); gen_args += 2; } else if ((args[5] == TCG_COND_LT || args[5] == TCG_COND_GE) && temps[args[3]].state == TCG_TEMP_CONST @@ -1233,13 +1295,59 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, && temps[args[4]].val == 0) { /* Simplify LT/GE comparisons vs zero to a single compare vs the high word of the input. */ + do_setcond_high: s->gen_opc_buf[op_index] = INDEX_op_setcond_i32; reset_temp(args[0]); + temps[args[0]].mask = 1; gen_args[0] = args[0]; gen_args[1] = args[2]; gen_args[2] = args[4]; gen_args[3] = args[5]; gen_args += 4; + } else if (args[5] == TCG_COND_EQ) { + /* Simplify EQ comparisons where one of the pairs + can be simplified. */ + tmp = do_constant_folding_cond(INDEX_op_setcond_i32, + args[1], args[3], TCG_COND_EQ); + if (tmp == 0) { + goto do_setcond_const; + } else if (tmp == 1) { + goto do_setcond_high; + } + tmp = do_constant_folding_cond(INDEX_op_setcond_i32, + args[2], args[4], TCG_COND_EQ); + if (tmp == 0) { + goto do_setcond_high; + } else if (tmp != 1) { + goto do_default; + } + do_setcond_low: + reset_temp(args[0]); + temps[args[0]].mask = 1; + s->gen_opc_buf[op_index] = INDEX_op_setcond_i32; + gen_args[0] = args[0]; + gen_args[1] = args[1]; + gen_args[2] = args[3]; + gen_args[3] = args[5]; + gen_args += 4; + } else if (args[5] == TCG_COND_NE) { + /* Simplify NE comparisons where one of the pairs + can be simplified. */ + tmp = do_constant_folding_cond(INDEX_op_setcond_i32, + args[1], args[3], TCG_COND_NE); + if (tmp == 0) { + goto do_setcond_high; + } else if (tmp == 1) { + goto do_setcond_const; + } + tmp = do_constant_folding_cond(INDEX_op_setcond_i32, + args[2], args[4], TCG_COND_NE); + if (tmp == 0) { + goto do_setcond_low; + } else if (tmp == 1) { + goto do_setcond_const; + } + goto do_default; } else { goto do_default; } diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c index 07164e5..63e9c82 100644 --- a/tcg/s390/tcg-target.c +++ b/tcg/s390/tcg-target.c @@ -2344,8 +2344,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) } typedef struct { - DebugFrameCIE cie; - DebugFrameFDEHeader fde; + DebugFrameHeader h; uint8_t fde_def_cfa[4]; uint8_t fde_reg_ofs[18]; } DebugFrame; @@ -2355,16 +2354,16 @@ QEMU_BUILD_BUG_ON(FRAME_SIZE >= (1 << 14)); #define ELF_HOST_MACHINE EM_S390 -static DebugFrame debug_frame = { - .cie.len = sizeof(DebugFrameCIE)-4, /* length after .len member */ - .cie.id = -1, - .cie.version = 1, - .cie.code_align = 1, - .cie.data_align = 8, /* sleb128 8 */ - .cie.return_column = TCG_REG_R14, +static const DebugFrame debug_frame = { + .h.cie.len = sizeof(DebugFrameCIE)-4, /* length after .len member */ + .h.cie.id = -1, + .h.cie.version = 1, + .h.cie.code_align = 1, + .h.cie.data_align = 8, /* sleb128 8 */ + .h.cie.return_column = TCG_REG_R14, /* Total FDE size does not include the "len" member. */ - .fde.len = sizeof(DebugFrame) - offsetof(DebugFrame, fde.cie_offset), + .h.fde.len = sizeof(DebugFrame) - offsetof(DebugFrame, h.fde.cie_offset), .fde_def_cfa = { 12, TCG_REG_CALL_STACK, /* DW_CFA_def_cfa %r15, ... */ @@ -2386,8 +2385,5 @@ static DebugFrame debug_frame = { void tcg_register_jit(void *buf, size_t buf_size) { - debug_frame.fde.func_start = (uintptr_t)buf; - debug_frame.fde.func_len = buf_size; - tcg_register_jit_int(buf, buf_size, &debug_frame, sizeof(debug_frame)); } diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index 17ff577..40f2ec1 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -1499,23 +1499,22 @@ static void tcg_target_init(TCGContext *s) #endif typedef struct { - DebugFrameCIE cie; - DebugFrameFDEHeader fde; + DebugFrameHeader h; uint8_t fde_def_cfa[SPARC64 ? 4 : 2]; uint8_t fde_win_save; uint8_t fde_ret_save[3]; } DebugFrame; -static DebugFrame debug_frame = { - .cie.len = sizeof(DebugFrameCIE)-4, /* length after .len member */ - .cie.id = -1, - .cie.version = 1, - .cie.code_align = 1, - .cie.data_align = -sizeof(void *) & 0x7f, - .cie.return_column = 15, /* o7 */ +static const DebugFrame debug_frame = { + .h.cie.len = sizeof(DebugFrameCIE)-4, /* length after .len member */ + .h.cie.id = -1, + .h.cie.version = 1, + .h.cie.code_align = 1, + .h.cie.data_align = -sizeof(void *) & 0x7f, + .h.cie.return_column = 15, /* o7 */ /* Total FDE size does not include the "len" member. */ - .fde.len = sizeof(DebugFrame) - offsetof(DebugFrame, fde.cie_offset), + .h.fde.len = sizeof(DebugFrame) - offsetof(DebugFrame, h.fde.cie_offset), .fde_def_cfa = { #if SPARC64 @@ -1531,9 +1530,6 @@ static DebugFrame debug_frame = { void tcg_register_jit(void *buf, size_t buf_size) { - debug_frame.fde.func_start = (uintptr_t)buf; - debug_frame.fde.func_len = buf_size; - tcg_register_jit_int(buf, buf_size, &debug_frame, sizeof(debug_frame)); } diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index bdd0139..719533a 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -22,6 +22,8 @@ * THE SOFTWARE. */ #include "tcg.h" +#include "exec/helper-proto.h" +#include "exec/helper-gen.h" int gen_new_label(void); @@ -379,47 +381,6 @@ static inline void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg) tcg_gen_op2i_i32(INDEX_op_movi_i32, ret, arg); } -/* A version of dh_sizemask from def-helper.h that doesn't rely on - preprocessor magic. */ -static inline int tcg_gen_sizemask(int n, int is_64bit, int is_signed) -{ - return (is_64bit << n*2) | (is_signed << (n*2 + 1)); -} - -/* helper calls */ -static inline void tcg_gen_helperN(void *func, int flags, int sizemask, - TCGArg ret, int nargs, TCGArg *args) -{ - tcg_gen_callN(&tcg_ctx, func, flags, sizemask, ret, nargs, args); -} - -/* Note: Both tcg_gen_helper32() and tcg_gen_helper64() are currently - reserved for helpers in tcg-runtime.c. These helpers all do not read - globals and do not have side effects, hence the call to tcg_gen_callN() - with TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_SIDE_EFFECTS. This may need - to be adjusted if these functions start to be used with other helpers. */ -static inline void tcg_gen_helper32(void *func, int sizemask, TCGv_i32 ret, - TCGv_i32 a, TCGv_i32 b) -{ - TCGArg args[2]; - args[0] = GET_TCGV_I32(a); - args[1] = GET_TCGV_I32(b); - tcg_gen_callN(&tcg_ctx, func, - TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_SIDE_EFFECTS, - sizemask, GET_TCGV_I32(ret), 2, args); -} - -static inline void tcg_gen_helper64(void *func, int sizemask, TCGv_i64 ret, - TCGv_i64 a, TCGv_i64 b) -{ - TCGArg args[2]; - args[0] = GET_TCGV_I64(a); - args[1] = GET_TCGV_I64(b); - tcg_gen_callN(&tcg_ctx, func, - TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_SIDE_EFFECTS, - sizemask, GET_TCGV_I64(ret), 2, args); -} - /* 32 bit ops */ static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset) @@ -707,12 +668,7 @@ static inline void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) tcg_gen_op5_i32(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2); tcg_temp_free_i32(t0); } else { - int sizemask = 0; - /* Return value and both arguments are 32-bit and signed. */ - sizemask |= tcg_gen_sizemask(0, 0, 1); - sizemask |= tcg_gen_sizemask(1, 0, 1); - sizemask |= tcg_gen_sizemask(2, 0, 1); - tcg_gen_helper32(tcg_helper_div_i32, sizemask, ret, arg1, arg2); + gen_helper_div_i32(ret, arg1, arg2); } } @@ -732,12 +688,7 @@ static inline void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) tcg_gen_op5_i32(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2); tcg_temp_free_i32(t0); } else { - int sizemask = 0; - /* Return value and both arguments are 32-bit and signed. */ - sizemask |= tcg_gen_sizemask(0, 0, 1); - sizemask |= tcg_gen_sizemask(1, 0, 1); - sizemask |= tcg_gen_sizemask(2, 0, 1); - tcg_gen_helper32(tcg_helper_rem_i32, sizemask, ret, arg1, arg2); + gen_helper_rem_i32(ret, arg1, arg2); } } @@ -751,12 +702,7 @@ static inline void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) tcg_gen_op5_i32(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2); tcg_temp_free_i32(t0); } else { - int sizemask = 0; - /* Return value and both arguments are 32-bit and unsigned. */ - sizemask |= tcg_gen_sizemask(0, 0, 0); - sizemask |= tcg_gen_sizemask(1, 0, 0); - sizemask |= tcg_gen_sizemask(2, 0, 0); - tcg_gen_helper32(tcg_helper_divu_i32, sizemask, ret, arg1, arg2); + gen_helper_divu_i32(ret, arg1, arg2); } } @@ -776,12 +722,7 @@ static inline void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) tcg_gen_op5_i32(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2); tcg_temp_free_i32(t0); } else { - int sizemask = 0; - /* Return value and both arguments are 32-bit and unsigned. */ - sizemask |= tcg_gen_sizemask(0, 0, 0); - sizemask |= tcg_gen_sizemask(1, 0, 0); - sizemask |= tcg_gen_sizemask(2, 0, 0); - tcg_gen_helper32(tcg_helper_remu_i32, sizemask, ret, arg1, arg2); + gen_helper_remu_i32(ret, arg1, arg2); } } @@ -945,13 +886,7 @@ static inline void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) specific code (x86) */ static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) { - int sizemask = 0; - /* Return value and both arguments are 64-bit and signed. */ - sizemask |= tcg_gen_sizemask(0, 1, 1); - sizemask |= tcg_gen_sizemask(1, 1, 1); - sizemask |= tcg_gen_sizemask(2, 1, 1); - - tcg_gen_helper64(tcg_helper_shl_i64, sizemask, ret, arg1, arg2); + gen_helper_shl_i64(ret, arg1, arg2); } static inline void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) @@ -961,13 +896,7 @@ static inline void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) { - int sizemask = 0; - /* Return value and both arguments are 64-bit and signed. */ - sizemask |= tcg_gen_sizemask(0, 1, 1); - sizemask |= tcg_gen_sizemask(1, 1, 1); - sizemask |= tcg_gen_sizemask(2, 1, 1); - - tcg_gen_helper64(tcg_helper_shr_i64, sizemask, ret, arg1, arg2); + gen_helper_shr_i64(ret, arg1, arg2); } static inline void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) @@ -977,13 +906,7 @@ static inline void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) { - int sizemask = 0; - /* Return value and both arguments are 64-bit and signed. */ - sizemask |= tcg_gen_sizemask(0, 1, 1); - sizemask |= tcg_gen_sizemask(1, 1, 1); - sizemask |= tcg_gen_sizemask(2, 1, 1); - - tcg_gen_helper64(tcg_helper_sar_i64, sizemask, ret, arg1, arg2); + gen_helper_sar_i64(ret, arg1, arg2); } static inline void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) @@ -1051,46 +974,22 @@ static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) static inline void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) { - int sizemask = 0; - /* Return value and both arguments are 64-bit and signed. */ - sizemask |= tcg_gen_sizemask(0, 1, 1); - sizemask |= tcg_gen_sizemask(1, 1, 1); - sizemask |= tcg_gen_sizemask(2, 1, 1); - - tcg_gen_helper64(tcg_helper_div_i64, sizemask, ret, arg1, arg2); + gen_helper_div_i64(ret, arg1, arg2); } static inline void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) { - int sizemask = 0; - /* Return value and both arguments are 64-bit and signed. */ - sizemask |= tcg_gen_sizemask(0, 1, 1); - sizemask |= tcg_gen_sizemask(1, 1, 1); - sizemask |= tcg_gen_sizemask(2, 1, 1); - - tcg_gen_helper64(tcg_helper_rem_i64, sizemask, ret, arg1, arg2); + gen_helper_rem_i64(ret, arg1, arg2); } static inline void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) { - int sizemask = 0; - /* Return value and both arguments are 64-bit and unsigned. */ - sizemask |= tcg_gen_sizemask(0, 1, 0); - sizemask |= tcg_gen_sizemask(1, 1, 0); - sizemask |= tcg_gen_sizemask(2, 1, 0); - - tcg_gen_helper64(tcg_helper_divu_i64, sizemask, ret, arg1, arg2); + gen_helper_divu_i64(ret, arg1, arg2); } static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) { - int sizemask = 0; - /* Return value and both arguments are 64-bit and unsigned. */ - sizemask |= tcg_gen_sizemask(0, 1, 0); - sizemask |= tcg_gen_sizemask(1, 1, 0); - sizemask |= tcg_gen_sizemask(2, 1, 0); - - tcg_gen_helper64(tcg_helper_remu_i64, sizemask, ret, arg1, arg2); + gen_helper_remu_i64(ret, arg1, arg2); } #else @@ -1357,12 +1256,7 @@ static inline void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) tcg_gen_op5_i64(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2); tcg_temp_free_i64(t0); } else { - int sizemask = 0; - /* Return value and both arguments are 64-bit and signed. */ - sizemask |= tcg_gen_sizemask(0, 1, 1); - sizemask |= tcg_gen_sizemask(1, 1, 1); - sizemask |= tcg_gen_sizemask(2, 1, 1); - tcg_gen_helper64(tcg_helper_div_i64, sizemask, ret, arg1, arg2); + gen_helper_div_i64(ret, arg1, arg2); } } @@ -1382,12 +1276,7 @@ static inline void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) tcg_gen_op5_i64(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2); tcg_temp_free_i64(t0); } else { - int sizemask = 0; - /* Return value and both arguments are 64-bit and signed. */ - sizemask |= tcg_gen_sizemask(0, 1, 1); - sizemask |= tcg_gen_sizemask(1, 1, 1); - sizemask |= tcg_gen_sizemask(2, 1, 1); - tcg_gen_helper64(tcg_helper_rem_i64, sizemask, ret, arg1, arg2); + gen_helper_rem_i64(ret, arg1, arg2); } } @@ -1401,12 +1290,7 @@ static inline void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) tcg_gen_op5_i64(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2); tcg_temp_free_i64(t0); } else { - int sizemask = 0; - /* Return value and both arguments are 64-bit and unsigned. */ - sizemask |= tcg_gen_sizemask(0, 1, 0); - sizemask |= tcg_gen_sizemask(1, 1, 0); - sizemask |= tcg_gen_sizemask(2, 1, 0); - tcg_gen_helper64(tcg_helper_divu_i64, sizemask, ret, arg1, arg2); + gen_helper_divu_i64(ret, arg1, arg2); } } @@ -1426,12 +1310,7 @@ static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) tcg_gen_op5_i64(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2); tcg_temp_free_i64(t0); } else { - int sizemask = 0; - /* Return value and both arguments are 64-bit and unsigned. */ - sizemask |= tcg_gen_sizemask(0, 1, 0); - sizemask |= tcg_gen_sizemask(1, 1, 0); - sizemask |= tcg_gen_sizemask(2, 1, 0); - tcg_gen_helper64(tcg_helper_remu_i64, sizemask, ret, arg1, arg2); + gen_helper_remu_i64(ret, arg1, arg2); } } #endif /* TCG_TARGET_REG_BITS == 32 */ @@ -2530,13 +2409,8 @@ static inline void tcg_gen_mulu2_i64(TCGv_i64 rl, TCGv_i64 rh, tcg_temp_free_i64(t); } else { TCGv_i64 t0 = tcg_temp_new_i64(); - int sizemask = 0; - /* Return value and both arguments are 64-bit and unsigned. */ - sizemask |= tcg_gen_sizemask(0, 1, 0); - sizemask |= tcg_gen_sizemask(1, 1, 0); - sizemask |= tcg_gen_sizemask(2, 1, 0); tcg_gen_mul_i64(t0, arg1, arg2); - tcg_gen_helper64(tcg_helper_muluh_i64, sizemask, rh, arg1, arg2); + gen_helper_muluh_i64(rh, arg1, arg2); tcg_gen_mov_i64(rl, t0); tcg_temp_free_i64(t0); } @@ -2575,13 +2449,8 @@ static inline void tcg_gen_muls2_i64(TCGv_i64 rl, TCGv_i64 rh, tcg_temp_free_i64(t3); } else { TCGv_i64 t0 = tcg_temp_new_i64(); - int sizemask = 0; - /* Return value and both arguments are 64-bit and signed. */ - sizemask |= tcg_gen_sizemask(0, 1, 1); - sizemask |= tcg_gen_sizemask(1, 1, 1); - sizemask |= tcg_gen_sizemask(2, 1, 1); tcg_gen_mul_i64(t0, arg1, arg2); - tcg_gen_helper64(tcg_helper_mulsh_i64, sizemask, rh, arg1, arg2); + gen_helper_mulsh_i64(rh, arg1, arg2); tcg_gen_mov_i64(rl, t0); tcg_temp_free_i64(t0); } diff --git a/tcg/tcg-runtime.h b/tcg/tcg-runtime.h index a1ebef9..23a0c37 100644 --- a/tcg/tcg-runtime.h +++ b/tcg/tcg-runtime.h @@ -1,20 +1,16 @@ -#ifndef TCG_RUNTIME_H -#define TCG_RUNTIME_H +DEF_HELPER_FLAGS_2(div_i32, TCG_CALL_NO_RWG_SE, s32, s32, s32) +DEF_HELPER_FLAGS_2(rem_i32, TCG_CALL_NO_RWG_SE, s32, s32, s32) +DEF_HELPER_FLAGS_2(divu_i32, TCG_CALL_NO_RWG_SE, i32, i32, i32) +DEF_HELPER_FLAGS_2(remu_i32, TCG_CALL_NO_RWG_SE, i32, i32, i32) -/* tcg-runtime.c */ -int32_t tcg_helper_div_i32(int32_t arg1, int32_t arg2); -int32_t tcg_helper_rem_i32(int32_t arg1, int32_t arg2); -uint32_t tcg_helper_divu_i32(uint32_t arg1, uint32_t arg2); -uint32_t tcg_helper_remu_i32(uint32_t arg1, uint32_t arg2); +DEF_HELPER_FLAGS_2(div_i64, TCG_CALL_NO_RWG_SE, s64, s64, s64) +DEF_HELPER_FLAGS_2(rem_i64, TCG_CALL_NO_RWG_SE, s64, s64, s64) +DEF_HELPER_FLAGS_2(divu_i64, TCG_CALL_NO_RWG_SE, i64, i64, i64) +DEF_HELPER_FLAGS_2(remu_i64, TCG_CALL_NO_RWG_SE, i64, i64, i64) -int64_t tcg_helper_shl_i64(int64_t arg1, int64_t arg2); -int64_t tcg_helper_shr_i64(int64_t arg1, int64_t arg2); -int64_t tcg_helper_sar_i64(int64_t arg1, int64_t arg2); -int64_t tcg_helper_div_i64(int64_t arg1, int64_t arg2); -int64_t tcg_helper_rem_i64(int64_t arg1, int64_t arg2); -int64_t tcg_helper_mulsh_i64(int64_t arg1, int64_t arg2); -uint64_t tcg_helper_divu_i64(uint64_t arg1, uint64_t arg2); -uint64_t tcg_helper_remu_i64(uint64_t arg1, uint64_t arg2); -uint64_t tcg_helper_muluh_i64(uint64_t arg1, uint64_t arg2); +DEF_HELPER_FLAGS_2(shl_i64, TCG_CALL_NO_RWG_SE, i64, i64, i64) +DEF_HELPER_FLAGS_2(shr_i64, TCG_CALL_NO_RWG_SE, i64, i64, i64) +DEF_HELPER_FLAGS_2(sar_i64, TCG_CALL_NO_RWG_SE, s64, s64, s64) -#endif +DEF_HELPER_FLAGS_2(mulsh_i64, TCG_CALL_NO_RWG_SE, s64, s64, s64) +DEF_HELPER_FLAGS_2(muluh_i64, TCG_CALL_NO_RWG_SE, i64, i64, i64) @@ -86,8 +86,14 @@ typedef struct QEMU_PACKED { uintptr_t func_len; } DebugFrameFDEHeader; +typedef struct QEMU_PACKED { + DebugFrameCIE cie; + DebugFrameFDEHeader fde; +} DebugFrameHeader; + static void tcg_register_jit_int(void *buf, size_t size, - void *debug_frame, size_t debug_frame_size) + const void *debug_frame, + size_t debug_frame_size) __attribute__((unused)); /* Forward declarations for functions declared and used in tcg-target.c. */ @@ -307,32 +313,17 @@ void tcg_pool_reset(TCGContext *s) s->pool_current = NULL; } -#include "helper.h" - typedef struct TCGHelperInfo { void *func; const char *name; + unsigned flags; + unsigned sizemask; } TCGHelperInfo; +#include "exec/helper-proto.h" + static const TCGHelperInfo all_helpers[] = { -#define GEN_HELPER 2 -#include "helper.h" - - /* Include tcg-runtime.c functions. */ - { tcg_helper_div_i32, "div_i32" }, - { tcg_helper_rem_i32, "rem_i32" }, - { tcg_helper_divu_i32, "divu_i32" }, - { tcg_helper_remu_i32, "remu_i32" }, - - { tcg_helper_shl_i64, "shl_i64" }, - { tcg_helper_shr_i64, "shr_i64" }, - { tcg_helper_sar_i64, "sar_i64" }, - { tcg_helper_div_i64, "div_i64" }, - { tcg_helper_rem_i64, "rem_i64" }, - { tcg_helper_divu_i64, "divu_i64" }, - { tcg_helper_remu_i64, "remu_i64" }, - { tcg_helper_mulsh_i64, "mulsh_i64" }, - { tcg_helper_muluh_i64, "muluh_i64" }, +#include "exec/helper-tcg.h" }; void tcg_context_init(TCGContext *s) @@ -373,7 +364,7 @@ void tcg_context_init(TCGContext *s) for (i = 0; i < ARRAY_SIZE(all_helpers); ++i) { g_hash_table_insert(helper_table, (gpointer)all_helpers[i].func, - (gpointer)all_helpers[i].name); + (gpointer)&all_helpers[i]); } tcg_target_init(s); @@ -706,13 +697,17 @@ int tcg_check_temp_count(void) /* Note: we convert the 64 bit args to 32 bit and do some alignment and endian swap. Maybe it would be better to do the alignment and endian swap in tcg_reg_alloc_call(). */ -void tcg_gen_callN(TCGContext *s, void *func, unsigned int flags, - int sizemask, TCGArg ret, int nargs, TCGArg *args) +void tcg_gen_callN(TCGContext *s, void *func, TCGArg ret, + int nargs, TCGArg *args) { - int i; - int real_args; - int nb_rets; + int i, real_args, nb_rets; + unsigned sizemask, flags; TCGArg *nparam; + TCGHelperInfo *info; + + info = g_hash_table_lookup(s->helpers, (gpointer)func); + flags = info->flags; + sizemask = info->sizemask; #if defined(__sparc__) && !defined(__arch64__) \ && !defined(CONFIG_TCG_INTERPRETER) @@ -798,9 +793,8 @@ void tcg_gen_callN(TCGContext *s, void *func, unsigned int flags, } real_args = 0; for (i = 0; i < nargs; i++) { -#if TCG_TARGET_REG_BITS < 64 int is_64bit = sizemask & (1 << (i+1)*2); - if (is_64bit) { + if (TCG_TARGET_REG_BITS < 64 && is_64bit) { #ifdef TCG_TARGET_CALL_ALIGN_ARGS /* some targets want aligned 64 bit args */ if (real_args & 1) { @@ -828,7 +822,6 @@ void tcg_gen_callN(TCGContext *s, void *func, unsigned int flags, real_args += 2; continue; } -#endif /* TCG_TARGET_REG_BITS < 64 */ *s->gen_opparam_ptr++ = args[i]; real_args++; @@ -1166,7 +1159,10 @@ static inline const char *tcg_find_helper(TCGContext *s, uintptr_t val) { const char *ret = NULL; if (s->helpers) { - ret = g_hash_table_lookup(s->helpers, (gpointer)val); + TCGHelperInfo *info = g_hash_table_lookup(s->helpers, (gpointer)val); + if (info) { + ret = info->name; + } } return ret; } @@ -2787,7 +2783,8 @@ static int find_string(const char *strtab, const char *str) } static void tcg_register_jit_int(void *buf_ptr, size_t buf_size, - void *debug_frame, size_t debug_frame_size) + const void *debug_frame, + size_t debug_frame_size) { struct __attribute__((packed)) DebugInfo { uint32_t len; @@ -2925,10 +2922,10 @@ static void tcg_register_jit_int(void *buf_ptr, size_t buf_size, uintptr_t buf = (uintptr_t)buf_ptr; size_t img_size = sizeof(struct ElfImage) + debug_frame_size; + DebugFrameHeader *dfh; img = g_malloc(img_size); *img = img_template; - memcpy(img + 1, debug_frame, debug_frame_size); img->phdr.p_vaddr = buf; img->phdr.p_paddr = buf; @@ -2956,6 +2953,11 @@ static void tcg_register_jit_int(void *buf_ptr, size_t buf_size, img->di.fn_low_pc = buf; img->di.fn_high_pc = buf + buf_size; + dfh = (DebugFrameHeader *)(img + 1); + memcpy(dfh, debug_frame, debug_frame_size); + dfh->fde.func_start = buf; + dfh->fde.func_len = buf_size; + #ifdef DEBUG_JIT /* Enable this block to be able to debug the ELF image file creation. One can use readelf, objdump, or other inspection utilities. */ @@ -2983,7 +2985,8 @@ static void tcg_register_jit_int(void *buf_ptr, size_t buf_size, and implement the internal function we declared earlier. */ static void tcg_register_jit_int(void *buf, size_t size, - void *debug_frame, size_t debug_frame_size) + const void *debug_frame, + size_t debug_frame_size) { } @@ -54,8 +54,6 @@ typedef uint64_t tcg_target_ulong; #error unsupported #endif -#include "tcg-runtime.h" - #if TCG_TARGET_NB_REGS <= 32 typedef uint32_t TCGRegSet; #elif TCG_TARGET_NB_REGS <= 64 @@ -725,8 +723,8 @@ void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs); #define tcg_temp_free_ptr(T) tcg_temp_free_i64(TCGV_PTR_TO_NAT(T)) #endif -void tcg_gen_callN(TCGContext *s, void *func, unsigned int flags, - int sizemask, TCGArg ret, int nargs, TCGArg *args); +void tcg_gen_callN(TCGContext *s, void *func, + TCGArg ret, int nargs, TCGArg *args); void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1, int c, int right, int arith); |
