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| author | Dongxue Zhang <elta.era@gmail.com> | 2014-07-28 23:58:21 +0800 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2014-07-28 23:37:15 +0200 |
| commit | 62eb3b9a34d9865a817cd57f400c5373d8fdbdde (patch) | |
| tree | e9b4e13279a988643e1a484fbe7298347191b077 | |
| parent | f45c56e0166e86d3b309ae72f4cb8e3d0949c7ef (diff) | |
| download | hqemu-62eb3b9a34d9865a817cd57f400c5373d8fdbdde.zip hqemu-62eb3b9a34d9865a817cd57f400c5373d8fdbdde.tar.gz | |
target-mips/translate.c: Free TCG in OPC_DINSV
Free t0 and t1 in opcode OPC_DINSV.
Signed-off-by: Dongxue Zhang <elta.era@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
| -rw-r--r-- | target-mips/translate.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index d7b8c4d..c381366 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -15300,6 +15300,9 @@ static void decode_opc (CPUMIPSState *env, DisasContext *ctx) gen_load_gpr(t1, rs); gen_helper_dinsv(cpu_gpr[rt], cpu_env, t1, t0); + + tcg_temp_free(t0); + tcg_temp_free(t1); break; } default: /* Invalid */ |
