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author | Jan Kiszka <jan.kiszka@siemens.com> | 2012-08-17 12:56:44 +0200 |
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committer | Anthony Liguori <aliguori@us.ibm.com> | 2012-08-21 15:18:24 -0500 |
commit | 0ec64507a5e6366e6d8070a82c866b935f687ed9 (patch) | |
tree | 27b76bb33aa7495c80d143ebbbdb4099be477043 | |
parent | 55ce75faf253d4369670f60409c608e665e8dde9 (diff) | |
download | hqemu-0ec64507a5e6366e6d8070a82c866b935f687ed9.zip hqemu-0ec64507a5e6366e6d8070a82c866b935f687ed9.tar.gz |
i82378: Remove bogus MMIO coalescing
This MMIO area is an entry gate to legacy PC ISA devices, addressed via
PIO over there. Quite a few of the PIO ports have side effects on access
like starting/stopping timers that must be executed properly ordered
/wrt the CPU. So we have to remove the coalescing mark.
Acked-by: Hervé Poussineau <hpoussin@reactos.org>
Acked-by: Andreas Färber <andreas.faerber@web.de>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
-rw-r--r-- | hw/i82378.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/hw/i82378.c b/hw/i82378.c index 9b11d90..2123c14 100644 --- a/hw/i82378.c +++ b/hw/i82378.c @@ -225,7 +225,6 @@ static int pci_i82378_init(PCIDevice *dev) pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->io); memory_region_init_io(&s->mem, &i82378_mem_ops, s, "i82378-mem", 0x01000000); - memory_region_set_coalescing(&s->mem); pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem); /* Make I/O address read only */ |