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authorVictor CLEMENT <victor.clement@openwide.fr>2015-06-02 14:56:23 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-06-02 14:56:25 +0100
commit0b2ff2ceb8a45cbe51ca13a1a32fc5bdeec71815 (patch)
tree916e23e70af189de62e8ec74e4559a32234a8202 /.mailmap
parentbd204e63a7ce9d1b5c5903c9033863b179194989 (diff)
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pl061: fix wrong calculation of GPIOMIS register
The masked interrupt status register should be the state of the interrupt after masking. There should be a logical AND instead of a logical OR between the interrupt status and the interrupt mask. Signed-off-by: Victor CLEMENT <victor.clement@openwide.fr> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1433154824-6927-1-git-send-email-victor.clement@openwide.fr Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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