diff options
author | Peter Stuge <peter@stuge.se> | 2008-07-07 06:38:51 +0000 |
---|---|---|
committer | Peter Stuge <peter@stuge.se> | 2008-07-07 06:38:51 +0000 |
commit | a95bad733f21e6d71c9e0ed19d25a008fd6215a1 (patch) | |
tree | 83dc53759cd8cca1419c8e1e43dc3e83d15995f2 /spi.c | |
parent | f07cbe317ba12c00fb4265394f26c011047c91f7 (diff) | |
download | flashrom-a95bad733f21e6d71c9e0ed19d25a008fd6215a1.zip flashrom-a95bad733f21e6d71c9e0ed19d25a008fd6215a1.tar.gz |
Trivial SPI cleanups
While writing a new SPI driver I fixed some things in the SPI code:
All calls to spi_command() had unneccessary #define duplications, and in some
cases the read count define could theoretically become harmful because NULL was
passed for the read buffer. Avoid a crash, should someone change the #defines.
I also noticed that the only caller of spi_page_program() was the it87 driver,
and spi_page_program() could only call back into the it87 driver. Removed the
function for easier-to-follow code and made it8716f_spi_page_program() static.
The ichspi driver's static page functions are already static.
Corresponding to flashrom svn r302 and coreboot v2 svn r3418.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
Diffstat (limited to 'spi.c')
-rw-r--r-- | spi.c | 39 |
1 files changed, 12 insertions, 27 deletions
@@ -51,7 +51,7 @@ static int spi_rdid(unsigned char *readarr, int bytes) { const unsigned char cmd[JEDEC_RDID_OUTSIZE] = {JEDEC_RDID}; - if (spi_command(JEDEC_RDID_OUTSIZE, bytes, cmd, readarr)) + if (spi_command(sizeof(cmd), bytes, cmd, readarr)) return 1; printf_debug("RDID returned %02x %02x %02x.\n", readarr[0], readarr[1], readarr[2]); return 0; @@ -61,7 +61,7 @@ static int spi_res(unsigned char *readarr) { const unsigned char cmd[JEDEC_RES_OUTSIZE] = {JEDEC_RES, 0, 0, 0}; - if (spi_command(JEDEC_RES_OUTSIZE, JEDEC_RES_INSIZE, cmd, readarr)) + if (spi_command(sizeof(cmd), JEDEC_RES_INSIZE, cmd, readarr)) return 1; printf_debug("RES returned %02x.\n", readarr[0]); return 0; @@ -72,7 +72,7 @@ void spi_write_enable() const unsigned char cmd[JEDEC_WREN_OUTSIZE] = {JEDEC_WREN}; /* Send WREN (Write Enable) */ - spi_command(JEDEC_WREN_OUTSIZE, JEDEC_WREN_INSIZE, cmd, NULL); + spi_command(sizeof(cmd), 0, cmd, NULL); } void spi_write_disable() @@ -80,7 +80,7 @@ void spi_write_disable() const unsigned char cmd[JEDEC_WRDI_OUTSIZE] = {JEDEC_WRDI}; /* Send WRDI (Write Disable) */ - spi_command(JEDEC_WRDI_OUTSIZE, JEDEC_WRDI_INSIZE, cmd, NULL); + spi_command(sizeof(cmd), 0, cmd, NULL); } static int probe_spi_rdid_generic(struct flashchip *flash, int bytes) @@ -182,10 +182,10 @@ int probe_spi_res(struct flashchip *flash) uint8_t spi_read_status_register() { const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = {JEDEC_RDSR}; - unsigned char readarr[1]; + unsigned char readarr[JEDEC_RDSR_INSIZE]; /* Read Status Register */ - spi_command(JEDEC_RDSR_OUTSIZE, JEDEC_RDSR_INSIZE, cmd, readarr); + spi_command(sizeof(cmd), sizeof(readarr), cmd, readarr); return readarr[0]; } @@ -273,7 +273,7 @@ int spi_chip_erase_c7(struct flashchip *flash) spi_disable_blockprotect(); spi_write_enable(); /* Send CE (Chip Erase) */ - spi_command(JEDEC_CE_C7_OUTSIZE, JEDEC_CE_C7_INSIZE, cmd, NULL); + spi_command(sizeof(cmd), 0, cmd, NULL); /* Wait until the Write-In-Progress bit is cleared. * This usually takes 1-85 s, so wait in 1 s steps. */ @@ -296,7 +296,7 @@ int spi_block_erase_d8(const struct flashchip *flash, unsigned long addr) cmd[3] = (addr & 0x000000ff); spi_write_enable(); /* Send BE (Block Erase) */ - spi_command(JEDEC_BE_D8_OUTSIZE, JEDEC_BE_D8_INSIZE, cmd, NULL); + spi_command(sizeof(cmd), 0, cmd, NULL); /* Wait until the Write-In-Progress bit is cleared. * This usually takes 100-4000 ms, so wait in 100 ms steps. */ @@ -315,7 +315,7 @@ int spi_sector_erase(const struct flashchip *flash, unsigned long addr) spi_write_enable(); /* Send SE (Sector Erase) */ - spi_command(JEDEC_SE_OUTSIZE, JEDEC_SE_INSIZE, cmd, NULL); + spi_command(sizeof(cmd), 0, cmd, NULL); /* Wait until the Write-In-Progress bit is cleared. * This usually takes 15-800 ms, so wait in 10 ms steps. */ @@ -324,21 +324,6 @@ int spi_sector_erase(const struct flashchip *flash, unsigned long addr) return 0; } -void spi_page_program(int block, uint8_t *buf, uint8_t *bios) -{ - switch (flashbus) { - case BUS_TYPE_IT87XX_SPI: - it8716f_spi_page_program(block, buf, bios); - break; - case BUS_TYPE_ICH7_SPI: - case BUS_TYPE_ICH9_SPI: - printf_debug("%s called, but not implemented for ICH\n", __FUNCTION__); - break; - default: - printf_debug("%s called, but no SPI chipset/strapping detected\n", __FUNCTION__); - } -} - /* * This is according the SST25VF016 datasheet, who knows it is more * generic that this... @@ -348,7 +333,7 @@ void spi_write_status_register(int status) const unsigned char cmd[JEDEC_WRSR_OUTSIZE] = {JEDEC_WRSR, (unsigned char)status}; /* Send WRSR (Write Status Register) */ - spi_command(JEDEC_WRSR_OUTSIZE, JEDEC_WRSR_INSIZE, cmd, NULL); + spi_command(sizeof(cmd), 0, cmd, NULL); } void spi_byte_program(int address, uint8_t byte) @@ -361,7 +346,7 @@ void spi_byte_program(int address, uint8_t byte) }; /* Send Byte-Program */ - spi_command(JEDEC_BYTE_PROGRAM_OUTSIZE, JEDEC_BYTE_PROGRAM_INSIZE, cmd, NULL); + spi_command(sizeof(cmd), 0, cmd, NULL); } void spi_disable_blockprotect(void) @@ -386,7 +371,7 @@ void spi_nbyte_read(int address, uint8_t *bytes, int len) }; /* Send Read */ - spi_command(JEDEC_READ_OUTSIZE, len, cmd, bytes); + spi_command(sizeof(cmd), len, cmd, bytes); } int spi_chip_read(struct flashchip *flash, uint8_t *buf) |