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| author | Andrew Morgan <ziltro@ziltro.com> | 2011-09-13 22:05:44 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2011-09-13 22:05:44 +0000 |
| commit | 6f4d5c9662f6942df1a87e3ca4326c5f713cc61e (patch) | |
| tree | e8013877c9ecee79c2743cc060c33c2b9050bbc4 /flashchips.c | |
| parent | ba14d671def1cafc4056fa904b8fef827915d98a (diff) | |
| download | flashrom-6f4d5c9662f6942df1a87e3ca4326c5f713cc61e.zip flashrom-6f4d5c9662f6942df1a87e3ca4326c5f713cc61e.tar.gz | |
Add probe/read support for the Catalyst CAT28F512 chip
Write and erase are NOT yet supported!
Probe and read are tested by Andrew Morgan and Uwe Hermann on Intel NICs.
Corresponding to flashrom svn r1439.
Signed-off-by: Andrew Morgan <ziltro@ziltro.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Diffstat (limited to 'flashchips.c')
| -rw-r--r-- | flashchips.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/flashchips.c b/flashchips.c index f3cca35..d520a1c 100644 --- a/flashchips.c +++ b/flashchips.c @@ -2341,6 +2341,30 @@ const struct flashchip flashchips[] = { }, { + .vendor = "Catalyst", + .name = "CAT28F512", + .bustype = BUS_PARALLEL, + .manufacture_id = CATALYST_ID, + .model_id = CATALYST_CAT28F512, + .total_size = 64, + .page_size = 0, /* unused */ + .feature_bits = 0, + .tested = TEST_OK_PR, + .probe = probe_jedec, /* FIXME! */ + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = NULL, /* TODO */ + }, + }, + .write = NULL, /* TODO */ + .read = read_memmapped, + .voltage = {4500, 5500}, + }, + + { .vendor = "Bright", .name = "BM29F040", .bustype = BUS_PARALLEL, |
