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author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2010-05-28 15:53:08 +0000 |
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committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2010-05-28 15:53:08 +0000 |
commit | b245b08eff1664125301326b566adc21203fbf95 (patch) | |
tree | 3a8deb77453a25d539577a7bfe50aa2bf98682f6 /flash.h | |
parent | abc169b2fc2ded7947781e2e3cefd9bd3a5a0253 (diff) | |
download | flashrom-b245b08eff1664125301326b566adc21203fbf95.zip flashrom-b245b08eff1664125301326b566adc21203fbf95.tar.gz |
ICH SPI can enforce address restrictions for all accesses which take an address (well, it could if the chipset implementation was not broken)
Since exploiting the broken implementation is harder than conforming to the
address restrictions wherever possible, conform to the address restrictions
instead. This patch eliminates a lot of transaction errors people were seeing
on chip probe.
Corresponding to flashrom svn r1016.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Diffstat (limited to 'flash.h')
-rw-r--r-- | flash.h | 2 |
1 files changed, 2 insertions, 0 deletions
@@ -663,6 +663,8 @@ int default_spi_send_multicommand(struct spi_command *cmds); uint32_t spi_get_valid_read_addr(void); /* ichspi.c */ +extern int ichspi_lock; +extern uint32_t ichspi_bbar; int ich_init_opcodes(void); int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); |