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author | Rudolf Marek <r.marek@assembler.cz> | 2009-02-01 18:40:50 +0000 |
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committer | Rudolf Marek <r.marek@assembler.cz> | 2009-02-01 18:40:50 +0000 |
commit | dc3d4f828d060e60b786f8fb8c7397611045b017 (patch) | |
tree | b86bbe5ab35551e4b54f54fd67bf243426fa1318 /chipset_enable.c | |
parent | bde010248106d860e2252479d9142c06b1fa463d (diff) | |
download | flashrom-dc3d4f828d060e60b786f8fb8c7397611045b017.zip flashrom-dc3d4f828d060e60b786f8fb8c7397611045b017.tar.gz |
Following patch fixes VIA SPI (VT8237S)
It needs to have opcodes initialized same way as ICH7.
Corresponding to flashrom svn r413 and coreboot v2 svn r3926.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
Diffstat (limited to 'chipset_enable.c')
-rw-r--r-- | chipset_enable.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index dc5cccb..3eb8b28 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -221,6 +221,7 @@ static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) *(uint16_t *) (spibar + 0x6c)); flashbus = BUS_TYPE_VIA_SPI; + ich_init_opcodes(); return 0; } |