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authorUrja Rannikko <urjaman@gmail.com>2008-10-18 13:54:30 +0000
committerPeter Stuge <peter@stuge.se>2008-10-18 13:54:30 +0000
commit3eb2d1e9f1d53d4df699b741c151a66b904dd1a4 (patch)
tree0c806490d4be0f07f3468f55ed2e49104024251e /chipset_enable.c
parenta3d371ff9b124d00a60efec29e2f4d1647c04a92 (diff)
downloadflashrom-3eb2d1e9f1d53d4df699b741c151a66b904dd1a4.zip
flashrom-3eb2d1e9f1d53d4df699b741c151a66b904dd1a4.tar.gz
Allow the SiS 620 chipset to detect and read at least 256kb chips
Based on the 5595 datasheet and uniflash 1.40 sources, only looking for info about SiS620. Corresponding to flashrom svn r325 and coreboot v2 svn r3668. Signed-off-by: Urja Rannikko <urjaman@gmail.com> Acked-by: Peter Stuge <peter@stuge.se>
Diffstat (limited to 'chipset_enable.c')
-rw-r--r--chipset_enable.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/chipset_enable.c b/chipset_enable.c
index 22c40df..3ad99cc 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -540,6 +540,17 @@ static int enable_flash_sis5595(struct pci_dev *dev, const char *name)
return -1;
}
+ /* Extended BIOS enable = 1, Lower BIOS Enable = 1 */
+ new = pci_read_byte(dev,0x40);
+ new &= 0xFB;
+ new |= 0x3;
+ pci_write_byte(dev,0x40,new);
+ newer = pci_read_byte(dev,0x40);
+ if (newer != new) {
+ printf("tried to set register 0x%x to 0x%x on %s failed (WARNING ONLY)\n", 0x40, new, name);
+ printf("Stuck at 0x%x\n", newer);
+ return -1;
+ }
return 0;
}
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