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| author | Ed Swierk <eswierk@aristanetworks.com> | 2008-10-29 14:54:36 +0000 |
|---|---|---|
| committer | Ed Swierk <eswierk@arastra.com> | 2008-10-29 14:54:36 +0000 |
| commit | 3ce88ac6797300ec7eefdb2ac7f943fe82aedc8a (patch) | |
| tree | e21d91b2aff114a28b59fa57ae2e74495ae3f645 /chipset_enable.c | |
| parent | 41fcb04c431410272dca2f2b37ddc17394877e31 (diff) | |
| download | flashrom-3ce88ac6797300ec7eefdb2ac7f943fe82aedc8a.zip flashrom-3ce88ac6797300ec7eefdb2ac7f943fe82aedc8a.tar.gz | |
Enable SPI boot flash support on EP80579, which has the ICH7 register set
Corresponding to flashrom svn r332 and coreboot v2 svn r3706.
Signed-off-by: Ed Swierk <eswierk@aristanetworks.com>
Acked-by: Ed Swierk <eswierk@aristanetworks.com>
Diffstat (limited to 'chipset_enable.c')
| -rw-r--r-- | chipset_enable.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index 87b2380..d7a5b02 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -767,7 +767,7 @@ static const FLASH_ENABLE enables[] = { {0x8086, 0x25a1, "Intel 6300ESB", enable_flash_ich_4e}, {0x8086, 0x2640, "Intel ICH6/ICH6R", enable_flash_ich_dc}, {0x8086, 0x2641, "Intel ICH6-M", enable_flash_ich_dc}, - {0x8086, 0x5031, "Intel EP80579", enable_flash_ich_dc}, + {0x8086, 0x5031, "Intel EP80579", enable_flash_ich7}, {0x8086, 0x27b0, "Intel ICH7DH", enable_flash_ich7}, {0x8086, 0x27b8, "Intel ICH7/ICH7R", enable_flash_ich7}, {0x8086, 0x27b9, "Intel ICH7M", enable_flash_ich7}, |
