diff options
Diffstat (limited to 'src/arch/arm/dpi_macros.th')
| -rw-r--r-- | src/arch/arm/dpi_macros.th | 112 |
1 files changed, 112 insertions, 0 deletions
diff --git a/src/arch/arm/dpi_macros.th b/src/arch/arm/dpi_macros.th new file mode 100644 index 0000000..be43d1f --- /dev/null +++ b/src/arch/arm/dpi_macros.th @@ -0,0 +1,112 @@ +/* -- <Op> -- */ + +/* Rd := Rn <Op> (imm8 ROR rot) ; rot is power of 2 */ +#define ARM_<Op>_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \ + ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_<Op>, rd, rn, imm8, rot, cond) +#define ARM_<Op>_REG_IMM(p, rd, rn, imm8, rot) \ + ARM_<Op>_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL) +#define ARM_<Op>S_REG_IMM_COND(p, rd, rn, imm8, rot, cond) \ + ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_<Op>, rd, rn, imm8, rot, cond) +#define ARM_<Op>S_REG_IMM(p, rd, rn, imm8, rot) \ + ARM_<Op>S_REG_IMM_COND(p, rd, rn, imm8, rot, ARMCOND_AL) + +#ifndef ARM_NOIASM +#define _<Op>_REG_IMM_COND(rd, rn, imm8, rot, cond) \ + ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_<Op>, rd, rn, imm8, rot, cond) +#define _<Op>_REG_IMM(rd, rn, imm8, rot) \ + _<Op>_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL) +#define _<Op>S_REG_IMM_COND(rd, rn, imm8, rot, cond) \ + ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_<Op>, rd, rn, imm8, rot, cond) +#define _<Op>S_REG_IMM(rd, rn, imm8, rot) \ + _<Op>S_REG_IMM_COND(rd, rn, imm8, rot, ARMCOND_AL) +#endif + + +/* Rd := Rn <Op> imm8 */ +#define ARM_<Op>_REG_IMM8_COND(p, rd, rn, imm8, cond) \ + ARM_<Op>_REG_IMM_COND(p, rd, rn, imm8, 0, cond) +#define ARM_<Op>_REG_IMM8(p, rd, rn, imm8) \ + ARM_<Op>_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL) +#define ARM_<Op>S_REG_IMM8_COND(p, rd, rn, imm8, cond) \ + ARM_<Op>S_REG_IMM_COND(p, rd, rn, imm8, 0, cond) +#define ARM_<Op>S_REG_IMM8(p, rd, rn, imm8) \ + ARM_<Op>S_REG_IMM8_COND(p, rd, rn, imm8, ARMCOND_AL) + +#ifndef ARM_NOIASM +#define _<Op>_REG_IMM8_COND(rd, rn, imm8, cond) \ + _<Op>_REG_IMM_COND(rd, rn, imm8, 0, cond) +#define _<Op>_REG_IMM8(rd, rn, imm8) \ + _<Op>_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL) +#define _<Op>S_REG_IMM8_COND(rd, rn, imm8, cond) \ + _<Op>S_REG_IMM_COND(rd, rn, imm8, 0, cond) +#define _<Op>S_REG_IMM8(rd, rn, imm8) \ + _<Op>S_REG_IMM8_COND(rd, rn, imm8, ARMCOND_AL) +#endif + + +/* Rd := Rn <Op> Rm */ +#define ARM_<Op>_REG_REG_COND(p, rd, rn, rm, cond) \ + ARM_DPIOP_REG_REG_COND(p, ARMOP_<Op>, rd, rn, rm, cond) +#define ARM_<Op>_REG_REG(p, rd, rn, rm) \ + ARM_<Op>_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL) +#define ARM_<Op>S_REG_REG_COND(p, rd, rn, rm, cond) \ + ARM_DPIOP_S_REG_REG_COND(p, ARMOP_<Op>, rd, rn, rm, cond) +#define ARM_<Op>S_REG_REG(p, rd, rn, rm) \ + ARM_<Op>S_REG_REG_COND(p, rd, rn, rm, ARMCOND_AL) + +#ifndef ARM_NOIASM +#define _<Op>_REG_REG_COND(rd, rn, rm, cond) \ + ARM_IASM_DPIOP_REG_REG_COND(ARMOP_<Op>, rd, rn, rm, cond) +#define _<Op>_REG_REG(rd, rn, rm) \ + _<Op>_REG_REG_COND(rd, rn, rm, ARMCOND_AL) +#define _<Op>S_REG_REG_COND(rd, rn, rm, cond) \ + ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_<Op>, rd, rn, rm, cond) +#define _<Op>S_REG_REG(rd, rn, rm) \ + _<Op>S_REG_REG_COND(rd, rn, rm, ARMCOND_AL) +#endif + + +/* Rd := Rn <Op> (Rm <shift_type> imm_shift) */ +#define ARM_<Op>_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \ + ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_<Op>, rd, rn, rm, shift_type, imm_shift, cond) +#define ARM_<Op>_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \ + ARM_<Op>_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL) +#define ARM_<Op>S_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, cond) \ + ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_<Op>, rd, rn, rm, shift_type, imm_shift, cond) +#define ARM_<Op>S_REG_IMMSHIFT(p, rd, rn, rm, shift_type, imm_shift) \ + ARM_<Op>S_REG_IMMSHIFT_COND(p, rd, rn, rm, shift_type, imm_shift, ARMCOND_AL) + +#ifndef ARM_NOIASM +#define _<Op>_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \ + ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_<Op>, rd, rn, rm, shift_type, imm_shift, cond) +#define _<Op>_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \ + _<Op>_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL) +#define _<Op>S_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, cond) \ + ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_<Op>, rd, rn, rm, shift_type, imm_shift, cond) +#define _<Op>S_REG_IMMSHIFT(rd, rn, rm, shift_type, imm_shift) \ + _<Op>S_REG_IMMSHIFT_COND(rd, rn, rm, shift_type, imm_shift, ARMCOND_AL) +#endif + + +/* Rd := Rn <Op> (Rm <shift_type> Rs) */ +#define ARM_<Op>_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \ + ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_<Op>, rd, rn, rm, shift_t, rs, cond) +#define ARM_<Op>_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \ + ARM_<Op>_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL) +#define ARM_<Op>S_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, cond) \ + ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_<Op>, rd, rn, rm, shift_t, rs, cond) +#define ARM_<Op>S_REG_REGSHIFT(p, rd, rn, rm, shift_type, rs) \ + ARM_<Op>S_REG_REGSHIFT_COND(p, rd, rn, rm, shift_type, rs, ARMCOND_AL) + +#ifndef ARM_NOIASM +#define _<Op>_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \ + ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_<Op>, rd, rn, rm, shift_t, rs, cond) +#define _<Op>_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \ + _<Op>_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL) +#define _<Op>S_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, cond) \ + ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_<Op>, rd, rn, rm, shift_t, rs, cond) +#define _<Op>S_REG_REGSHIFT(rd, rn, rm, shift_type, rs) \ + _<Op>S_REG_REGSHIFT_COND(rd, rn, rm, shift_type, rs, ARMCOND_AL) +#endif + + |
