1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
|
/**
* VP8 NEON optimisations
*
* Copyright (c) 2010 Rob Clark <rob@ti.com>
* Copyright (c) 2011 Mans Rullgard <mans@mansr.com>
*
* This file is part of FFmpeg.
*
* FFmpeg is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* FFmpeg is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with FFmpeg; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "asm.S"
function ff_vp8_luma_dc_wht_neon, export=1
vld1.16 {q0-q1}, [r1,:128]
vmov.i16 q15, #0
vadd.i16 d4, d0, d3
vadd.i16 d6, d1, d2
vst1.16 {q15}, [r1,:128]!
vsub.i16 d7, d1, d2
vsub.i16 d5, d0, d3
vst1.16 {q15}, [r1,:128]
vadd.i16 q0, q2, q3
vsub.i16 q1, q2, q3
vmov.i16 q8, #3
vtrn.32 d0, d2
vtrn.32 d1, d3
vtrn.16 d0, d1
vtrn.16 d2, d3
vadd.i16 d0, d0, d16
vadd.i16 d4, d0, d3
vadd.i16 d6, d1, d2
vsub.i16 d7, d1, d2
vsub.i16 d5, d0, d3
vadd.i16 q0, q2, q3
vsub.i16 q1, q2, q3
vshr.s16 q0, q0, #3
vshr.s16 q1, q1, #3
mov r3, #32
vst1.16 {d0[0]}, [r0,:16], r3
vst1.16 {d1[0]}, [r0,:16], r3
vst1.16 {d2[0]}, [r0,:16], r3
vst1.16 {d3[0]}, [r0,:16], r3
vst1.16 {d0[1]}, [r0,:16], r3
vst1.16 {d1[1]}, [r0,:16], r3
vst1.16 {d2[1]}, [r0,:16], r3
vst1.16 {d3[1]}, [r0,:16], r3
vst1.16 {d0[2]}, [r0,:16], r3
vst1.16 {d1[2]}, [r0,:16], r3
vst1.16 {d2[2]}, [r0,:16], r3
vst1.16 {d3[2]}, [r0,:16], r3
vst1.16 {d0[3]}, [r0,:16], r3
vst1.16 {d1[3]}, [r0,:16], r3
vst1.16 {d2[3]}, [r0,:16], r3
vst1.16 {d3[3]}, [r0,:16], r3
bx lr
endfunc
function ff_vp8_luma_dc_wht_dc_neon, export=1
ldrsh r2, [r1]
mov r3, #0
add r2, r2, #3
strh r3, [r1]
asr r2, r2, #3
.rept 16
strh r2, [r0], #32
.endr
bx lr
endfunc
function ff_vp8_idct_add_neon, export=1
vld1.16 {q0-q1}, [r1,:128]
movw r3, #20091
movt r3, #35468/2
vdup.32 d4, r3
vmull.s16 q12, d1, d4[0]
vmull.s16 q13, d3, d4[0]
vqdmulh.s16 d20, d1, d4[1]
vqdmulh.s16 d23, d3, d4[1]
vshrn.s32 d21, q12, #16
vshrn.s32 d22, q13, #16
vadd.s16 d21, d21, d1
vadd.s16 d22, d22, d3
vadd.s16 d16, d0, d2
vsub.s16 d17, d0, d2
vadd.s16 d18, d21, d23
vsub.s16 d19, d20, d22
vadd.s16 q0, q8, q9
vsub.s16 q1, q8, q9
vtrn.32 d0, d3
vtrn.32 d1, d2
vtrn.16 d0, d1
vtrn.16 d3, d2
vmov.i16 q15, #0
vmull.s16 q12, d1, d4[0]
vst1.16 {q15}, [r1,:128]!
vmull.s16 q13, d2, d4[0]
vst1.16 {q15}, [r1,:128]
vqdmulh.s16 d21, d1, d4[1]
vqdmulh.s16 d23, d2, d4[1]
vshrn.s32 d20, q12, #16
vshrn.s32 d22, q13, #16
vadd.i16 d20, d20, d1
vadd.i16 d22, d22, d2
vadd.i16 d16, d0, d3
vsub.i16 d17, d0, d3
vadd.i16 d18, d20, d23
vld1.32 {d20[]}, [r0,:32], r2
vsub.i16 d19, d21, d22
vld1.32 {d22[]}, [r0,:32], r2
vadd.s16 q0, q8, q9
vld1.32 {d23[]}, [r0,:32], r2
vsub.s16 q1, q8, q9
vld1.32 {d21[]}, [r0,:32], r2
vrshr.s16 q0, q0, #3
vtrn.32 q10, q11
vrshr.s16 q1, q1, #3
sub r0, r0, r2, lsl #2
vtrn.32 d0, d3
vtrn.32 d1, d2
vtrn.16 d0, d1
vtrn.16 d3, d2
vaddw.u8 q0, q0, d20
vaddw.u8 q1, q1, d21
vqmovun.s16 d0, q0
vqmovun.s16 d1, q1
vst1.32 {d0[0]}, [r0,:32], r2
vst1.32 {d0[1]}, [r0,:32], r2
vst1.32 {d1[1]}, [r0,:32], r2
vst1.32 {d1[0]}, [r0,:32], r2
bx lr
endfunc
function ff_vp8_idct_dc_add_neon, export=1
mov r3, #0
ldrsh r12, [r1]
strh r3, [r1]
vdup.16 q1, r12
vrshr.s16 q1, q1, #3
vld1.32 {d0[]}, [r0,:32], r2
vld1.32 {d1[]}, [r0,:32], r2
vld1.32 {d0[1]}, [r0,:32], r2
vld1.32 {d1[1]}, [r0,:32], r2
vaddw.u8 q2, q1, d0
vaddw.u8 q3, q1, d1
sub r0, r0, r2, lsl #2
vqmovun.s16 d0, q2
vqmovun.s16 d1, q3
vst1.32 {d0[0]}, [r0,:32], r2
vst1.32 {d1[0]}, [r0,:32], r2
vst1.32 {d0[1]}, [r0,:32], r2
vst1.32 {d1[1]}, [r0,:32], r2
bx lr
endfunc
function ff_vp8_idct_dc_add4uv_neon, export=1
vmov.i16 d0, #0
mov r3, #32
vld1.16 {d16[]}, [r1,:16]
vst1.16 {d0[0]}, [r1,:16], r3
vld1.16 {d17[]}, [r1,:16]
vst1.16 {d0[0]}, [r1,:16], r3
vld1.16 {d18[]}, [r1,:16]
vst1.16 {d0[0]}, [r1,:16], r3
vld1.16 {d19[]}, [r1,:16]
vst1.16 {d0[0]}, [r1,:16], r3
mov r3, r0
vrshr.s16 q8, q8, #3 @ dc >>= 3
vld1.8 {d0}, [r0,:64], r2
vrshr.s16 q9, q9, #3
vld1.8 {d1}, [r0,:64], r2
vaddw.u8 q10, q8, d0
vld1.8 {d2}, [r0,:64], r2
vaddw.u8 q0, q8, d1
vld1.8 {d3}, [r0,:64], r2
vaddw.u8 q11, q8, d2
vld1.8 {d4}, [r0,:64], r2
vaddw.u8 q1, q8, d3
vld1.8 {d5}, [r0,:64], r2
vaddw.u8 q12, q9, d4
vld1.8 {d6}, [r0,:64], r2
vaddw.u8 q2, q9, d5
vld1.8 {d7}, [r0,:64], r2
vaddw.u8 q13, q9, d6
vqmovun.s16 d20, q10
vaddw.u8 q3, q9, d7
vqmovun.s16 d21, q0
vqmovun.s16 d22, q11
vst1.8 {d20}, [r3,:64], r2
vqmovun.s16 d23, q1
vst1.8 {d21}, [r3,:64], r2
vqmovun.s16 d24, q12
vst1.8 {d22}, [r3,:64], r2
vqmovun.s16 d25, q2
vst1.8 {d23}, [r3,:64], r2
vqmovun.s16 d26, q13
vst1.8 {d24}, [r3,:64], r2
vqmovun.s16 d27, q3
vst1.8 {d25}, [r3,:64], r2
vst1.8 {d26}, [r3,:64], r2
vst1.8 {d27}, [r3,:64], r2
bx lr
endfunc
function ff_vp8_idct_dc_add4y_neon, export=1
vmov.i16 d0, #0
mov r3, #32
vld1.16 {d16[]}, [r1,:16]
vst1.16 {d0[0]}, [r1,:16], r3
vld1.16 {d17[]}, [r1,:16]
vst1.16 {d0[0]}, [r1,:16], r3
vld1.16 {d18[]}, [r1,:16]
vst1.16 {d0[0]}, [r1,:16], r3
vld1.16 {d19[]}, [r1,:16]
vst1.16 {d0[0]}, [r1,:16], r3
vrshr.s16 q8, q8, #3 @ dc >>= 3
vld1.8 {q0}, [r0,:128], r2
vrshr.s16 q9, q9, #3
vld1.8 {q1}, [r0,:128], r2
vaddw.u8 q10, q8, d0
vld1.8 {q2}, [r0,:128], r2
vaddw.u8 q0, q9, d1
vld1.8 {q3}, [r0,:128], r2
vaddw.u8 q11, q8, d2
vaddw.u8 q1, q9, d3
vaddw.u8 q12, q8, d4
vaddw.u8 q2, q9, d5
vaddw.u8 q13, q8, d6
vaddw.u8 q3, q9, d7
sub r0, r0, r2, lsl #2
vqmovun.s16 d20, q10
vqmovun.s16 d21, q0
vqmovun.s16 d22, q11
vqmovun.s16 d23, q1
vqmovun.s16 d24, q12
vst1.8 {q10}, [r0,:128], r2
vqmovun.s16 d25, q2
vst1.8 {q11}, [r0,:128], r2
vqmovun.s16 d26, q13
vst1.8 {q12}, [r0,:128], r2
vqmovun.s16 d27, q3
vst1.8 {q13}, [r0,:128], r2
bx lr
endfunc
@ Register layout:
@ P3..Q3 -> q0..q7
@ flim_E -> q14
@ flim_I -> q15
@ hev_thresh -> r12
@
.macro vp8_loop_filter, inner=0, simple=0
.if \simple
vabd.u8 q9, q3, q4 @ abs(P0-Q0)
vabd.u8 q15, q2, q5 @ abs(P1-Q1)
vqadd.u8 q9, q9, q9 @ abs(P0-Q0) * 2
vshr.u8 q10, q15, #1 @ abs(P1-Q1) / 2
vqadd.u8 q11, q9, q10 @ (abs(P0-Q0)*2) + (abs(P1-Q1)/2)
vmov.i8 q13, #0x80
vcle.u8 q8, q11, q14 @ (abs(P0-Q0)*2) + (abs(P1-Q1)/2) <= flim
.else
@ calculate hev and normal_limit:
vabd.u8 q12, q2, q3 @ abs(P1-P0)
vabd.u8 q13, q5, q4 @ abs(Q1-Q0)
vabd.u8 q10, q0, q1 @ abs(P3-P2)
vabd.u8 q11, q1, q2 @ abs(P2-P1)
vcle.u8 q8, q12, q15 @ abs(P1-P0) <= flim_I
vcle.u8 q9, q13, q15 @ abs(Q1-Q0) <= flim_I
vcle.u8 q10, q10, q15 @ abs(P3-P2) <= flim_I
vcle.u8 q11, q11, q15 @ abs(P2-P1) <= flim_I
vand q8, q8, q9
vabd.u8 q9, q7, q6 @ abs(Q3-Q2)
vand q8, q8, q11
vabd.u8 q11, q6, q5 @ abs(Q2-Q1)
vand q8, q8, q10
vcle.u8 q10, q9, q15 @ abs(Q3-Q2) <= flim_I
vcle.u8 q11, q11, q15 @ abs(Q2-Q1) <= flim_I
vabd.u8 q9, q3, q4 @ abs(P0-Q0)
vabd.u8 q15, q2, q5 @ abs(P1-Q1)
vand q8, q8, q10
vqadd.u8 q9, q9, q9 @ abs(P0-Q0) * 2
vand q8, q8, q11
vshr.u8 q10, q15, #1 @ abs(P1-Q1) / 2
vdup.8 q15, r12 @ hev_thresh
vqadd.u8 q11, q9, q10 @ (abs(P0-Q0)*2) + (abs(P1-Q1)/2)
vcgt.u8 q12, q12, q15 @ abs(P1-P0) > hev_thresh
vcle.u8 q11, q11, q14 @ (abs(P0-Q0)*2) + (abs(P1-Q1)/2) <= flim_E
vcgt.u8 q14, q13, q15 @ abs(Q1-Q0) > hev_thresh
vand q8, q8, q11
vmov.i8 q13, #0x80
vorr q9, q12, q14
.endif
@ at this point:
@ q8: normal_limit
@ q9: hev
@ convert to signed value:
veor q3, q3, q13 @ PS0 = P0 ^ 0x80
veor q4, q4, q13 @ QS0 = Q0 ^ 0x80
vmov.i16 q12, #3
vsubl.s8 q10, d8, d6 @ QS0 - PS0
vsubl.s8 q11, d9, d7 @ (widened to 16bit)
veor q2, q2, q13 @ PS1 = P1 ^ 0x80
veor q5, q5, q13 @ QS1 = Q1 ^ 0x80
vmul.i16 q10, q10, q12 @ w = 3 * (QS0 - PS0)
vmul.i16 q11, q11, q12
vqsub.s8 q12, q2, q5 @ clamp(PS1-QS1)
vmov.i8 q14, #4
vmov.i8 q15, #3
.if \inner
vand q12, q12, q9 @ if(hev) w += clamp(PS1-QS1)
.endif
vaddw.s8 q10, q10, d24 @ w += clamp(PS1-QS1)
vaddw.s8 q11, q11, d25
vqmovn.s16 d20, q10 @ narrow result back into q10
vqmovn.s16 d21, q11
.if !\inner && !\simple
veor q1, q1, q13 @ PS2 = P2 ^ 0x80
veor q6, q6, q13 @ QS2 = Q2 ^ 0x80
.endif
vand q10, q10, q8 @ w &= normal_limit
@ registers used at this point..
@ q0 -> P3 (don't corrupt)
@ q1-q6 -> PS2-QS2
@ q7 -> Q3 (don't corrupt)
@ q9 -> hev
@ q10 -> w
@ q13 -> #0x80
@ q14 -> #4
@ q15 -> #3
@ q8, q11, q12 -> unused
@ filter_common: is4tap==1
@ c1 = clamp(w + 4) >> 3;
@ c2 = clamp(w + 3) >> 3;
@ Q0 = s2u(QS0 - c1);
@ P0 = s2u(PS0 + c2);
.if \simple
vqadd.s8 q11, q10, q14 @ c1 = clamp((w&hev)+4)
vqadd.s8 q12, q10, q15 @ c2 = clamp((w&hev)+3)
vshr.s8 q11, q11, #3 @ c1 >>= 3
vshr.s8 q12, q12, #3 @ c2 >>= 3
vqsub.s8 q4, q4, q11 @ QS0 = clamp(QS0-c1)
vqadd.s8 q3, q3, q12 @ PS0 = clamp(PS0+c2)
veor q4, q4, q13 @ Q0 = QS0 ^ 0x80
veor q3, q3, q13 @ P0 = PS0 ^ 0x80
veor q5, q5, q13 @ Q1 = QS1 ^ 0x80
veor q2, q2, q13 @ P1 = PS1 ^ 0x80
.elseif \inner
@ the !is4tap case of filter_common, only used for inner blocks
@ c3 = ((c1&~hev) + 1) >> 1;
@ Q1 = s2u(QS1 - c3);
@ P1 = s2u(PS1 + c3);
vqadd.s8 q11, q10, q14 @ c1 = clamp((w&hev)+4)
vqadd.s8 q12, q10, q15 @ c2 = clamp((w&hev)+3)
vshr.s8 q11, q11, #3 @ c1 >>= 3
vshr.s8 q12, q12, #3 @ c2 >>= 3
vqsub.s8 q4, q4, q11 @ QS0 = clamp(QS0-c1)
vqadd.s8 q3, q3, q12 @ PS0 = clamp(PS0+c2)
vbic q11, q11, q9 @ c1 & ~hev
veor q4, q4, q13 @ Q0 = QS0 ^ 0x80
vrshr.s8 q11, q11, #1 @ c3 >>= 1
veor q3, q3, q13 @ P0 = PS0 ^ 0x80
vqsub.s8 q5, q5, q11 @ QS1 = clamp(QS1-c3)
vqadd.s8 q2, q2, q11 @ PS1 = clamp(PS1+c3)
veor q5, q5, q13 @ Q1 = QS1 ^ 0x80
veor q2, q2, q13 @ P1 = PS1 ^ 0x80
.else
vand q12, q10, q9 @ w & hev
vqadd.s8 q11, q12, q14 @ c1 = clamp((w&hev)+4)
vqadd.s8 q12, q12, q15 @ c2 = clamp((w&hev)+3)
vshr.s8 q11, q11, #3 @ c1 >>= 3
vshr.s8 q12, q12, #3 @ c2 >>= 3
vbic q10, q10, q9 @ w &= ~hev
vqsub.s8 q4, q4, q11 @ QS0 = clamp(QS0-c1)
vqadd.s8 q3, q3, q12 @ PS0 = clamp(PS0+c2)
@ filter_mbedge:
@ a = clamp((27*w + 63) >> 7);
@ Q0 = s2u(QS0 - a);
@ P0 = s2u(PS0 + a);
@ a = clamp((18*w + 63) >> 7);
@ Q1 = s2u(QS1 - a);
@ P1 = s2u(PS1 + a);
@ a = clamp((9*w + 63) >> 7);
@ Q2 = s2u(QS2 - a);
@ P2 = s2u(PS2 + a);
vmov.i16 q9, #63
vshll.s8 q14, d20, #3
vshll.s8 q15, d21, #3
vaddw.s8 q14, q14, d20
vaddw.s8 q15, q15, d21
vadd.s16 q8, q9, q14
vadd.s16 q9, q9, q15 @ 9*w + 63
vadd.s16 q11, q8, q14
vadd.s16 q12, q9, q15 @ 18*w + 63
vadd.s16 q14, q11, q14
vadd.s16 q15, q12, q15 @ 27*w + 63
vqshrn.s16 d16, q8, #7
vqshrn.s16 d17, q9, #7 @ clamp(( 9*w + 63)>>7)
vqshrn.s16 d22, q11, #7
vqshrn.s16 d23, q12, #7 @ clamp((18*w + 63)>>7)
vqshrn.s16 d28, q14, #7
vqshrn.s16 d29, q15, #7 @ clamp((27*w + 63)>>7)
vqadd.s8 q1, q1, q8 @ PS2 = clamp(PS2+a)
vqsub.s8 q6, q6, q8 @ QS2 = clamp(QS2-a)
vqadd.s8 q2, q2, q11 @ PS1 = clamp(PS1+a)
vqsub.s8 q5, q5, q11 @ QS1 = clamp(QS1-a)
vqadd.s8 q3, q3, q14 @ PS0 = clamp(PS0+a)
vqsub.s8 q4, q4, q14 @ QS0 = clamp(QS0-a)
veor q3, q3, q13 @ P0 = PS0 ^ 0x80
veor q4, q4, q13 @ Q0 = QS0 ^ 0x80
veor q2, q2, q13 @ P1 = PS1 ^ 0x80
veor q5, q5, q13 @ Q1 = QS1 ^ 0x80
veor q1, q1, q13 @ P2 = PS2 ^ 0x80
veor q6, q6, q13 @ Q2 = QS2 ^ 0x80
.endif
.endm
.macro transpose8x16matrix
vtrn.32 q0, q4
vtrn.32 q1, q5
vtrn.32 q2, q6
vtrn.32 q3, q7
vtrn.16 q0, q2
vtrn.16 q1, q3
vtrn.16 q4, q6
vtrn.16 q5, q7
vtrn.8 q0, q1
vtrn.8 q2, q3
vtrn.8 q4, q5
vtrn.8 q6, q7
.endm
.macro vp8_v_loop_filter16 name, inner=0, simple=0
function ff_vp8_v_loop_filter16\name\()_neon, export=1
vpush {q4-q7}
sub r0, r0, r1, lsl #1+!\simple
@ Load pixels:
.if !\simple
ldr r12, [sp, #64] @ hev_thresh
vld1.8 {q0}, [r0,:128], r1 @ P3
vld1.8 {q1}, [r0,:128], r1 @ P2
.endif
vld1.8 {q2}, [r0,:128], r1 @ P1
vld1.8 {q3}, [r0,:128], r1 @ P0
vld1.8 {q4}, [r0,:128], r1 @ Q0
vld1.8 {q5}, [r0,:128], r1 @ Q1
.if !\simple
vld1.8 {q6}, [r0,:128], r1 @ Q2
vld1.8 {q7}, [r0,:128] @ Q3
vdup.8 q15, r3 @ flim_I
.endif
vdup.8 q14, r2 @ flim_E
vp8_loop_filter inner=\inner, simple=\simple
@ back up to P2: dst -= stride * 6
sub r0, r0, r1, lsl #2
.if !\simple
sub r0, r0, r1, lsl #1
@ Store pixels:
vst1.8 {q1}, [r0,:128], r1 @ P2
.endif
vst1.8 {q2}, [r0,:128], r1 @ P1
vst1.8 {q3}, [r0,:128], r1 @ P0
vst1.8 {q4}, [r0,:128], r1 @ Q0
vst1.8 {q5}, [r0,:128], r1 @ Q1
.if !\simple
vst1.8 {q6}, [r0,:128] @ Q2
.endif
vpop {q4-q7}
bx lr
endfunc
.endm
vp8_v_loop_filter16
vp8_v_loop_filter16 _inner, inner=1
vp8_v_loop_filter16 _simple, simple=1
.macro vp8_v_loop_filter8uv name, inner=0
function ff_vp8_v_loop_filter8uv\name\()_neon, export=1
vpush {q4-q7}
sub r0, r0, r2, lsl #2
sub r1, r1, r2, lsl #2
ldr r12, [sp, #64] @ flim_I
@ Load pixels:
vld1.8 {d0}, [r0,:64], r2 @ P3
vld1.8 {d1}, [r1,:64], r2 @ P3
vld1.8 {d2}, [r0,:64], r2 @ P2
vld1.8 {d3}, [r1,:64], r2 @ P2
vld1.8 {d4}, [r0,:64], r2 @ P1
vld1.8 {d5}, [r1,:64], r2 @ P1
vld1.8 {d6}, [r0,:64], r2 @ P0
vld1.8 {d7}, [r1,:64], r2 @ P0
vld1.8 {d8}, [r0,:64], r2 @ Q0
vld1.8 {d9}, [r1,:64], r2 @ Q0
vld1.8 {d10}, [r0,:64], r2 @ Q1
vld1.8 {d11}, [r1,:64], r2 @ Q1
vld1.8 {d12}, [r0,:64], r2 @ Q2
vld1.8 {d13}, [r1,:64], r2 @ Q2
vld1.8 {d14}, [r0,:64] @ Q3
vld1.8 {d15}, [r1,:64] @ Q3
vdup.8 q14, r3 @ flim_E
vdup.8 q15, r12 @ flim_I
ldr r12, [sp, #68] @ hev_thresh
vp8_loop_filter inner=\inner
@ back up to P2: u,v -= stride * 6
sub r0, r0, r2, lsl #2
sub r1, r1, r2, lsl #2
sub r0, r0, r2, lsl #1
sub r1, r1, r2, lsl #1
@ Store pixels:
vst1.8 {d2}, [r0,:64], r2 @ P2
vst1.8 {d3}, [r1,:64], r2 @ P2
vst1.8 {d4}, [r0,:64], r2 @ P1
vst1.8 {d5}, [r1,:64], r2 @ P1
vst1.8 {d6}, [r0,:64], r2 @ P0
vst1.8 {d7}, [r1,:64], r2 @ P0
vst1.8 {d8}, [r0,:64], r2 @ Q0
vst1.8 {d9}, [r1,:64], r2 @ Q0
vst1.8 {d10}, [r0,:64], r2 @ Q1
vst1.8 {d11}, [r1,:64], r2 @ Q1
vst1.8 {d12}, [r0,:64] @ Q2
vst1.8 {d13}, [r1,:64] @ Q2
vpop {q4-q7}
bx lr
endfunc
.endm
vp8_v_loop_filter8uv
vp8_v_loop_filter8uv _inner, inner=1
.macro vp8_h_loop_filter16 name, inner=0, simple=0
function ff_vp8_h_loop_filter16\name\()_neon, export=1
vpush {q4-q7}
sub r0, r0, #4
.if !\simple
ldr r12, [sp, #64] @ hev_thresh
.endif
@ Load pixels:
vld1.8 {d0}, [r0], r1 @ load first 8-line src data
vld1.8 {d2}, [r0], r1
vld1.8 {d4}, [r0], r1
vld1.8 {d6}, [r0], r1
vld1.8 {d8}, [r0], r1
vld1.8 {d10}, [r0], r1
vld1.8 {d12}, [r0], r1
vld1.8 {d14}, [r0], r1
vld1.8 {d1}, [r0], r1 @ load second 8-line src data
vld1.8 {d3}, [r0], r1
vld1.8 {d5}, [r0], r1
vld1.8 {d7}, [r0], r1
vld1.8 {d9}, [r0], r1
vld1.8 {d11}, [r0], r1
vld1.8 {d13}, [r0], r1
vld1.8 {d15}, [r0], r1
transpose8x16matrix
vdup.8 q14, r2 @ flim_E
.if !\simple
vdup.8 q15, r3 @ flim_I
.endif
vp8_loop_filter inner=\inner, simple=\simple
sub r0, r0, r1, lsl #4 @ backup 16 rows
transpose8x16matrix
@ Store pixels:
vst1.8 {d0}, [r0], r1
vst1.8 {d2}, [r0], r1
vst1.8 {d4}, [r0], r1
vst1.8 {d6}, [r0], r1
vst1.8 {d8}, [r0], r1
vst1.8 {d10}, [r0], r1
vst1.8 {d12}, [r0], r1
vst1.8 {d14}, [r0], r1
vst1.8 {d1}, [r0], r1
vst1.8 {d3}, [r0], r1
vst1.8 {d5}, [r0], r1
vst1.8 {d7}, [r0], r1
vst1.8 {d9}, [r0], r1
vst1.8 {d11}, [r0], r1
vst1.8 {d13}, [r0], r1
vst1.8 {d15}, [r0]
vpop {q4-q7}
bx lr
endfunc
.endm
vp8_h_loop_filter16
vp8_h_loop_filter16 _inner, inner=1
vp8_h_loop_filter16 _simple, simple=1
.macro vp8_h_loop_filter8uv name, inner=0
function ff_vp8_h_loop_filter8uv\name\()_neon, export=1
vpush {q4-q7}
sub r0, r0, #4
sub r1, r1, #4
ldr r12, [sp, #64] @ flim_I
@ Load pixels:
vld1.8 {d0}, [r0], r2 @ load u
vld1.8 {d1}, [r1], r2 @ load v
vld1.8 {d2}, [r0], r2
vld1.8 {d3}, [r1], r2
vld1.8 {d4}, [r0], r2
vld1.8 {d5}, [r1], r2
vld1.8 {d6}, [r0], r2
vld1.8 {d7}, [r1], r2
vld1.8 {d8}, [r0], r2
vld1.8 {d9}, [r1], r2
vld1.8 {d10}, [r0], r2
vld1.8 {d11}, [r1], r2
vld1.8 {d12}, [r0], r2
vld1.8 {d13}, [r1], r2
vld1.8 {d14}, [r0], r2
vld1.8 {d15}, [r1], r2
transpose8x16matrix
vdup.8 q14, r3 @ flim_E
vdup.8 q15, r12 @ flim_I
ldr r12, [sp, #68] @ hev_thresh
vp8_loop_filter inner=\inner
sub r0, r0, r2, lsl #3 @ backup u 8 rows
sub r1, r1, r2, lsl #3 @ backup v 8 rows
transpose8x16matrix
@ Store pixels:
vst1.8 {d0}, [r0], r2
vst1.8 {d1}, [r1], r2
vst1.8 {d2}, [r0], r2
vst1.8 {d3}, [r1], r2
vst1.8 {d4}, [r0], r2
vst1.8 {d5}, [r1], r2
vst1.8 {d6}, [r0], r2
vst1.8 {d7}, [r1], r2
vst1.8 {d8}, [r0], r2
vst1.8 {d9}, [r1], r2
vst1.8 {d10}, [r0], r2
vst1.8 {d11}, [r1], r2
vst1.8 {d12}, [r0], r2
vst1.8 {d13}, [r1], r2
vst1.8 {d14}, [r0]
vst1.8 {d15}, [r1]
vpop {q4-q7}
bx lr
endfunc
.endm
vp8_h_loop_filter8uv
vp8_h_loop_filter8uv _inner, inner=1
function ff_put_vp8_pixels16_neon, export=1
ldr r12, [sp, #0] @ h
1:
subs r12, r12, #4
vld1.8 {q0}, [r2], r3
vld1.8 {q1}, [r2], r3
vld1.8 {q2}, [r2], r3
vld1.8 {q3}, [r2], r3
vst1.8 {q0}, [r0,:128], r1
vst1.8 {q1}, [r0,:128], r1
vst1.8 {q2}, [r0,:128], r1
vst1.8 {q3}, [r0,:128], r1
bgt 1b
bx lr
endfunc
function ff_put_vp8_pixels8_neon, export=1
ldr r12, [sp, #0] @ h
1:
subs r12, r12, #4
vld1.8 {d0}, [r2], r3
vld1.8 {d1}, [r2], r3
vld1.8 {d2}, [r2], r3
vld1.8 {d3}, [r2], r3
vst1.8 {d0}, [r0,:64], r1
vst1.8 {d1}, [r0,:64], r1
vst1.8 {d2}, [r0,:64], r1
vst1.8 {d3}, [r0,:64], r1
bgt 1b
bx lr
endfunc
function ff_put_vp8_pixels4_neon, export=1
ldr r12, [sp, #0] @ h
push {r4-r6,lr}
1:
subs r12, r12, #4
ldr_post r4, r2, r3
ldr_post r5, r2, r3
ldr_post r6, r2, r3
ldr_post lr, r2, r3
str_post r4, r0, r1
str_post r5, r0, r1
str_post r6, r0, r1
str_post lr, r0, r1
bgt 1b
pop {r4-r6,pc}
endfunc
/* 4/6-tap 8th-pel MC */
.macro vp8_epel8_h6 d, a, b
vext.8 d27, \a, \b, #1
vmovl.u8 q8, \a
vext.8 d28, \a, \b, #2
vmovl.u8 q9, d27
vext.8 d29, \a, \b, #3
vmovl.u8 q10, d28
vext.8 d30, \a, \b, #4
vmovl.u8 q11, d29
vext.8 d31, \a, \b, #5
vmovl.u8 q12, d30
vmul.u16 q10, q10, d0[2]
vmovl.u8 q13, d31
vmul.u16 q11, q11, d0[3]
vmls.u16 q10, q9, d0[1]
vmls.u16 q11, q12, d1[0]
vmla.u16 q10, q8, d0[0]
vmla.u16 q11, q13, d1[1]
vqadd.s16 q11, q10, q11
vqrshrun.s16 \d, q11, #7
.endm
.macro vp8_epel16_h6 d0, d1, s0, s1, s2, q0, q1
vext.8 q14, \q0, \q1, #3
vext.8 q15, \q0, \q1, #4
vmovl.u8 q11, d28
vmovl.u8 q14, d29
vext.8 q3, \q0, \q1, #2
vmovl.u8 q12, d30
vmovl.u8 q15, d31
vext.8 q8, \q0, \q1, #1
vmovl.u8 q10, d6
vmovl.u8 q3, d7
vext.8 q2, \q0, \q1, #5
vmovl.u8 q13, d4
vmovl.u8 q2, d5
vmovl.u8 q9, d16
vmovl.u8 q8, d17
vmul.u16 q11, q11, d0[3]
vmul.u16 q10, q10, d0[2]
vmul.u16 q3, q3, d0[2]
vmul.u16 q14, q14, d0[3]
vmls.u16 q11, q12, d1[0]
vmovl.u8 q12, \s0
vmovl.u8 q1, \s1
vmls.u16 q10, q9, d0[1]
vmls.u16 q3, q8, d0[1]
vmls.u16 q14, q15, d1[0]
vmla.u16 q10, q12, d0[0]
vmla.u16 q11, q13, d1[1]
vmla.u16 q3, q1, d0[0]
vmla.u16 q14, q2, d1[1]
vqadd.s16 q11, q10, q11
vqadd.s16 q14, q3, q14
vqrshrun.s16 \d0, q11, #7
vqrshrun.s16 \d1, q14, #7
.endm
.macro vp8_epel8_v6 d0, s0, s1, s2, s3, s4, s5
vmovl.u8 q10, \s2
vmovl.u8 q11, \s3
vmovl.u8 q9, \s1
vmovl.u8 q12, \s4
vmovl.u8 q8, \s0
vmovl.u8 q13, \s5
vmul.u16 q10, q10, d0[2]
vmul.u16 q11, q11, d0[3]
vmls.u16 q10, q9, d0[1]
vmls.u16 q11, q12, d1[0]
vmla.u16 q10, q8, d0[0]
vmla.u16 q11, q13, d1[1]
vqadd.s16 q11, q10, q11
vqrshrun.s16 \d0, q11, #7
.endm
.macro vp8_epel8_v6_y2 d0, d1, s0, s1, s2, s3, s4, s5, s6
vmovl.u8 q10, \s0
vmovl.u8 q11, \s3
vmovl.u8 q14, \s6
vmovl.u8 q9, \s1
vmovl.u8 q12, \s4
vmovl.u8 q8, \s2
vmovl.u8 q13, \s5
vmul.u16 q10, q10, d0[0]
vmul.u16 q15, q11, d0[3]
vmul.u16 q11, q11, d0[2]
vmul.u16 q14, q14, d1[1]
vmls.u16 q10, q9, d0[1]
vmls.u16 q15, q12, d1[0]
vmls.u16 q11, q8, d0[1]
vmls.u16 q14, q13, d1[0]
vmla.u16 q10, q8, d0[2]
vmla.u16 q15, q13, d1[1]
vmla.u16 q11, q9, d0[0]
vmla.u16 q14, q12, d0[3]
vqadd.s16 q15, q10, q15
vqadd.s16 q14, q11, q14
vqrshrun.s16 \d0, q15, #7
vqrshrun.s16 \d1, q14, #7
.endm
.macro vp8_epel8_h4 d, a, b
vext.8 d28, \a, \b, #1
vmovl.u8 q9, \a
vext.8 d29, \a, \b, #2
vmovl.u8 q10, d28
vext.8 d30, \a, \b, #3
vmovl.u8 q11, d29
vmovl.u8 q12, d30
vmul.u16 q10, q10, d0[2]
vmul.u16 q11, q11, d0[3]
vmls.u16 q10, q9, d0[1]
vmls.u16 q11, q12, d1[0]
vqadd.s16 q11, q10, q11
vqrshrun.s16 \d, q11, #7
.endm
.macro vp8_epel8_v4_y2 d0, d1, s0, s1, s2, s3, s4
vmovl.u8 q9, \s0
vmovl.u8 q10, \s1
vmovl.u8 q11, \s2
vmovl.u8 q12, \s3
vmovl.u8 q13, \s4
vmul.u16 q8, q10, d0[2]
vmul.u16 q14, q11, d0[3]
vmul.u16 q11, q11, d0[2]
vmul.u16 q15, q12, d0[3]
vmls.u16 q8, q9, d0[1]
vmls.u16 q14, q12, d1[0]
vmls.u16 q11, q10, d0[1]
vmls.u16 q15, q13, d1[0]
vqadd.s16 q8, q8, q14
vqadd.s16 q11, q11, q15
vqrshrun.s16 \d0, q8, #7
vqrshrun.s16 \d1, q11, #7
.endm
function ff_put_vp8_epel16_v6_neon, export=1
sub r2, r2, r3, lsl #1
push {r4,lr}
vpush {d8-d15}
ldr r4, [sp, #80] @ my
movrel lr, subpel_filters-16
ldr r12, [sp, #72] @ h
add r4, lr, r4, lsl #4
vld1.16 {q0}, [r4,:128]
1:
vld1.8 {d2-d3}, [r2], r3
vld1.8 {d4-d5}, [r2], r3
vld1.8 {d6-d7}, [r2], r3
vld1.8 {d8-d9}, [r2], r3
vld1.8 {d10-d11},[r2], r3
vld1.8 {d12-d13},[r2], r3
vld1.8 {d14-d15},[r2]
sub r2, r2, r3, lsl #2
vp8_epel8_v6_y2 d2, d4, d2, d4, d6, d8, d10, d12, d14
vp8_epel8_v6_y2 d3, d5, d3, d5, d7, d9, d11, d13, d15
vst1.8 {d2-d3}, [r0,:128], r1
vst1.8 {d4-d5}, [r0,:128], r1
subs r12, r12, #2
bne 1b
vpop {d8-d15}
pop {r4,pc}
endfunc
function ff_put_vp8_epel16_h6_neon, export=1
sub r2, r2, #2
push {r4,lr}
ldr r4, [sp, #12] @ mx
movrel lr, subpel_filters-16
ldr r12, [sp, #8] @ h
add r4, lr, r4, lsl #4
vld1.16 {q0}, [r4,:128]
1:
vld1.8 {d2-d4}, [r2], r3
vp8_epel16_h6 d2, d3, d2, d3, d4, q1, q2
vst1.8 {d2-d3}, [r0,:128], r1
subs r12, r12, #1
bne 1b
pop {r4,pc}
endfunc
function ff_put_vp8_epel16_h6v6_neon, export=1
sub r2, r2, r3, lsl #1
sub r2, r2, #2
push {r4,lr}
vpush {d8-d9}
@ first pass (horizontal):
ldr r4, [sp, #28] @ mx
movrel lr, subpel_filters-16
ldr r12, [sp, #24] @ h
add r4, lr, r4, lsl #4
sub sp, sp, #336+16
vld1.16 {q0}, [r4,:128]
add lr, sp, #15
add r12, r12, #5
bic lr, lr, #15
1:
vld1.8 {d2,d3,d4}, [r2], r3
vp8_epel16_h6 d2, d3, d2, d3, d4, q1, q2
vst1.8 {d2-d3}, [lr,:128]!
subs r12, r12, #1
bne 1b
@ second pass (vertical):
ldr r4, [sp, #336+16+32] @ my
movrel lr, subpel_filters-16
ldr r12, [sp, #336+16+24] @ h
add r4, lr, r4, lsl #4
add lr, sp, #15
vld1.16 {q0}, [r4,:128]
bic lr, lr, #15
2:
vld1.8 {d2-d5}, [lr,:128]!
vld1.8 {d6-d9}, [lr,:128]!
vld1.8 {d28-d31},[lr,:128]
sub lr, lr, #48
vp8_epel8_v6 d2, d2, d4, d6, d8, d28, d30
vp8_epel8_v6 d3, d3, d5, d7, d9, d29, d31
vst1.8 {d2-d3}, [r0,:128], r1
subs r12, r12, #1
bne 2b
add sp, sp, #336+16
vpop {d8-d9}
pop {r4,pc}
endfunc
function ff_put_vp8_epel8_v6_neon, export=1
sub r2, r2, r3, lsl #1
push {r4,lr}
ldr r4, [sp, #16] @ my
movrel lr, subpel_filters-16
ldr r12, [sp, #8] @ h
add r4, lr, r4, lsl #4
vld1.16 {q0}, [r4,:128]
1:
vld1.8 {d2}, [r2], r3
vld1.8 {d3}, [r2], r3
vld1.8 {d4}, [r2], r3
vld1.8 {d5}, [r2], r3
vld1.8 {d6}, [r2], r3
vld1.8 {d7}, [r2], r3
vld1.8 {d28}, [r2]
sub r2, r2, r3, lsl #2
vp8_epel8_v6_y2 d2, d3, d2, d3, d4, d5, d6, d7, d28
vst1.8 {d2}, [r0,:64], r1
vst1.8 {d3}, [r0,:64], r1
subs r12, r12, #2
bne 1b
pop {r4,pc}
endfunc
function ff_put_vp8_epel8_h6_neon, export=1
sub r2, r2, #2
push {r4,lr}
ldr r4, [sp, #12] @ mx
movrel lr, subpel_filters-16
ldr r12, [sp, #8] @ h
add r4, lr, r4, lsl #4
vld1.16 {q0}, [r4,:128]
1:
vld1.8 {d2,d3}, [r2], r3
vp8_epel8_h6 d2, d2, d3
vst1.8 {d2}, [r0,:64], r1
subs r12, r12, #1
bne 1b
pop {r4,pc}
endfunc
function ff_put_vp8_epel8_h6v6_neon, export=1
sub r2, r2, r3, lsl #1
sub r2, r2, #2
push {r4,lr}
@ first pass (horizontal):
ldr r4, [sp, #12] @ mx
movrel lr, subpel_filters-16
ldr r12, [sp, #8] @ h
add r4, lr, r4, lsl #4
sub sp, sp, #168+16
vld1.16 {q0}, [r4,:128]
add lr, sp, #15
add r12, r12, #5
bic lr, lr, #15
1:
vld1.8 {d2,d3}, [r2], r3
vp8_epel8_h6 d2, d2, d3
vst1.8 {d2}, [lr,:64]!
subs r12, r12, #1
bne 1b
@ second pass (vertical):
ldr r4, [sp, #168+16+16] @ my
movrel lr, subpel_filters-16
ldr r12, [sp, #168+16+8] @ h
add r4, lr, r4, lsl #4
add lr, sp, #15
vld1.16 {q0}, [r4,:128]
bic lr, lr, #15
2:
vld1.8 {d2-d5}, [lr,:128]!
vld1.8 {d6-d7}, [lr,:128]!
vld1.8 {d30}, [lr,:64]
sub lr, lr, #32
vp8_epel8_v6_y2 d2, d3, d2, d3, d4, d5, d6, d7, d30
vst1.8 {d2}, [r0,:64], r1
vst1.8 {d3}, [r0,:64], r1
subs r12, r12, #2
bne 2b
add sp, sp, #168+16
pop {r4,pc}
endfunc
function ff_put_vp8_epel8_v4_neon, export=1
sub r2, r2, r3
push {r4,lr}
ldr r4, [sp, #16] @ my
movrel lr, subpel_filters-16
ldr r12, [sp, #8] @ h
add r4, lr, r4, lsl #4
vld1.16 {q0}, [r4,:128]
1:
vld1.8 {d2}, [r2], r3
vld1.8 {d3}, [r2], r3
vld1.8 {d4}, [r2], r3
vld1.8 {d5}, [r2], r3
vld1.8 {d6}, [r2]
sub r2, r2, r3, lsl #1
vp8_epel8_v4_y2 d2, d3, d2, d3, d4, d5, d6
vst1.8 {d2}, [r0,:64], r1
vst1.8 {d3}, [r0,:64], r1
subs r12, r12, #2
bne 1b
pop {r4,pc}
endfunc
function ff_put_vp8_epel8_h4_neon, export=1
sub r2, r2, #1
push {r4,lr}
ldr r4, [sp, #12] @ mx
movrel lr, subpel_filters-16
ldr r12, [sp, #8] @ h
add r4, lr, r4, lsl #4
vld1.16 {q0}, [r4,:128]
1:
vld1.8 {d2,d3}, [r2], r3
vp8_epel8_h4 d2, d2, d3
vst1.8 {d2}, [r0,:64], r1
subs r12, r12, #1
bne 1b
pop {r4,pc}
endfunc
function ff_put_vp8_epel8_h4v4_neon, export=1
sub r2, r2, r3
sub r2, r2, #1
push {r4,lr}
@ first pass (horizontal):
ldr r4, [sp, #12] @ mx
movrel lr, subpel_filters-16
ldr r12, [sp, #8] @ h
add r4, lr, r4, lsl #4
sub sp, sp, #168+16
vld1.16 {q0}, [r4,:128]
add lr, sp, #15
add r12, r12, #3
bic lr, lr, #15
1:
vld1.8 {d2,d3}, [r2], r3
vp8_epel8_h4 d2, d2, d3
vst1.8 {d2}, [lr,:64]!
subs r12, r12, #1
bne 1b
@ second pass (vertical):
ldr r4, [sp, #168+16+16] @ my
movrel lr, subpel_filters-16
ldr r12, [sp, #168+16+8] @ h
add r4, lr, r4, lsl #4
add lr, sp, #15
vld1.16 {q0}, [r4,:128]
bic lr, lr, #15
2:
vld1.8 {d2-d5}, [lr,:128]!
vld1.8 {d6}, [lr,:64]
sub lr, lr, #16
vp8_epel8_v4_y2 d2, d3, d2, d3, d4, d5, d6
vst1.8 {d2}, [r0,:64], r1
vst1.8 {d3}, [r0,:64], r1
subs r12, r12, #2
bne 2b
add sp, sp, #168+16
pop {r4,pc}
endfunc
function ff_put_vp8_epel8_h6v4_neon, export=1
sub r2, r2, r3
sub r2, r2, #2
push {r4,lr}
@ first pass (horizontal):
ldr r4, [sp, #12] @ mx
movrel lr, subpel_filters-16
ldr r12, [sp, #8] @ h
add r4, lr, r4, lsl #4
sub sp, sp, #168+16
vld1.16 {q0}, [r4,:128]
add lr, sp, #15
add r12, r12, #3
bic lr, lr, #15
1:
vld1.8 {d2,d3}, [r2], r3
vp8_epel8_h6 d2, d2, d3
vst1.8 {d2}, [lr,:64]!
subs r12, r12, #1
bne 1b
@ second pass (vertical):
ldr r4, [sp, #168+16+16] @ my
movrel lr, subpel_filters-16
ldr r12, [sp, #168+16+8] @ h
add r4, lr, r4, lsl #4
add lr, sp, #15
vld1.16 {q0}, [r4,:128]
bic lr, lr, #15
2:
vld1.8 {d2-d5}, [lr,:128]!
vld1.8 {d6}, [lr,:64]
sub lr, lr, #16
vp8_epel8_v4_y2 d2, d3, d2, d3, d4, d5, d6
vst1.8 {d2}, [r0,:64], r1
vst1.8 {d3}, [r0,:64], r1
subs r12, r12, #2
bne 2b
add sp, sp, #168+16
pop {r4,pc}
endfunc
function ff_put_vp8_epel8_h4v6_neon, export=1
sub r2, r2, r3, lsl #1
sub r2, r2, #1
push {r4,lr}
@ first pass (horizontal):
ldr r4, [sp, #12] @ mx
movrel lr, subpel_filters-16
ldr r12, [sp, #8] @ h
add r4, lr, r4, lsl #4
sub sp, sp, #168+16
vld1.16 {q0}, [r4,:128]
add lr, sp, #15
add r12, r12, #5
bic lr, lr, #15
1:
vld1.8 {d2,d3}, [r2], r3
vp8_epel8_h4 d2, d2, d3
vst1.8 {d2}, [lr,:64]!
subs r12, r12, #1
bne 1b
@ second pass (vertical):
ldr r4, [sp, #168+16+16] @ my
movrel lr, subpel_filters-16
ldr r12, [sp, #168+16+8] @ h
add r4, lr, r4, lsl #4
add lr, sp, #15
vld1.16 {q0}, [r4,:128]
bic lr, lr, #15
2:
vld1.8 {d2-d5}, [lr,:128]!
vld1.8 {d6-d7}, [lr,:128]!
vld1.8 {d30}, [lr,:64]
sub lr, lr, #32
vp8_epel8_v6_y2 d2, d3, d2, d3, d4, d5, d6, d7, d30
vst1.8 {d2}, [r0,:64], r1
vst1.8 {d3}, [r0,:64], r1
subs r12, r12, #2
bne 2b
add sp, sp, #168+16
pop {r4,pc}
endfunc
.ltorg
function ff_put_vp8_epel4_v6_neon, export=1
sub r2, r2, r3, lsl #1
push {r4,lr}
ldr r4, [sp, #16] @ my
movrel lr, subpel_filters-16
ldr r12, [sp, #8] @ h
add r4, lr, r4, lsl #4
vld1.16 {q0}, [r4,:128]
1:
vld1.32 {d2[]}, [r2], r3
vld1.32 {d3[]}, [r2], r3
vld1.32 {d4[]}, [r2], r3
vld1.32 {d5[]}, [r2], r3
vld1.32 {d6[]}, [r2], r3
vld1.32 {d7[]}, [r2], r3
vld1.32 {d28[]}, [r2]
sub r2, r2, r3, lsl #2
vld1.32 {d2[1]}, [r2], r3
vld1.32 {d3[1]}, [r2], r3
vld1.32 {d4[1]}, [r2], r3
vld1.32 {d5[1]}, [r2], r3
vld1.32 {d6[1]}, [r2], r3
vld1.32 {d7[1]}, [r2], r3
vld1.32 {d28[1]}, [r2]
sub r2, r2, r3, lsl #2
vp8_epel8_v6_y2 d2, d3, d2, d3, d4, d5, d6, d7, d28
vst1.32 {d2[0]}, [r0,:32], r1
vst1.32 {d3[0]}, [r0,:32], r1
vst1.32 {d2[1]}, [r0,:32], r1
vst1.32 {d3[1]}, [r0,:32], r1
subs r12, r12, #4
bne 1b
pop {r4,pc}
endfunc
function ff_put_vp8_epel4_h6_neon, export=1
sub r2, r2, #2
push {r4,lr}
ldr r4, [sp, #12] @ mx
movrel lr, subpel_filters-16
ldr r12, [sp, #8] @ h
add r4, lr, r4, lsl #4
vld1.16 {q0}, [r4,:128]
1:
vld1.8 {q1}, [r2], r3
vp8_epel8_h6 d2, d2, d3
vst1.32 {d2[0]}, [r0,:32], r1
subs r12, r12, #1
bne 1b
pop {r4,pc}
endfunc
function ff_put_vp8_epel4_h6v6_neon, export=1
sub r2, r2, r3, lsl #1
sub r2, r2, #2
push {r4,lr}
ldr r4, [sp, #12] @ mx
movrel lr, subpel_filters-16
ldr r12, [sp, #8] @ h
add r4, lr, r4, lsl #4
sub sp, sp, #52+16
vld1.16 {q0}, [r4,:128]
add lr, sp, #15
add r12, r12, #5
bic lr, lr, #15
1:
vld1.8 {q1}, [r2], r3
vp8_epel8_h6 d2, d2, d3
vst1.32 {d2[0]}, [lr,:32]!
subs r12, r12, #1
bne 1b
ldr r4, [sp, #52+16+16] @ my
movrel lr, subpel_filters-16
ldr r12, [sp, #52+16+8] @ h
add r4, lr, r4, lsl #4
add lr, sp, #15
vld1.16 {q0}, [r4,:128]
bic lr, lr, #15
2:
vld1.8 {d2-d3}, [lr,:128]!
vld1.8 {d6}, [lr,:64]!
vld1.32 {d28[]}, [lr,:32]
sub lr, lr, #16
vld1.8 {d4-d5}, [lr]!
vld1.8 {d7}, [lr,:64]!
vld1.32 {d28[1]}, [lr,:32]
sub lr, lr, #16
vtrn.32 q1, q2
vtrn.32 d6, d7
vp8_epel8_v6_y2 d2, d3, d2, d4, d3, d5, d6, d7, d28
vst1.32 {d2[0]}, [r0,:32], r1
vst1.32 {d3[0]}, [r0,:32], r1
vst1.32 {d2[1]}, [r0,:32], r1
vst1.32 {d3[1]}, [r0,:32], r1
subs r12, r12, #4
bne 2b
add sp, sp, #52+16
pop {r4,pc}
endfunc
function ff_put_vp8_epel4_h4v6_neon, export=1
sub r2, r2, r3, lsl #1
sub r2, r2, #1
push {r4,lr}
ldr r4, [sp, #12] @ mx
movrel lr, subpel_filters-16
ldr r12, [sp, #8] @ h
add r4, lr, r4, lsl #4
sub sp, sp, #52+16
vld1.16 {q0}, [r4,:128]
add lr, sp, #15
add r12, r12, #5
bic lr, lr, #15
1:
vld1.8 {d2}, [r2], r3
vp8_epel8_h4 d2, d2, d2
vst1.32 {d2[0]}, [lr,:32]!
subs r12, r12, #1
bne 1b
ldr r4, [sp, #52+16+16] @ my
movrel lr, subpel_filters-16
ldr r12, [sp, #52+16+8] @ h
add r4, lr, r4, lsl #4
add lr, sp, #15
vld1.16 {q0}, [r4,:128]
bic lr, lr, #15
2:
vld1.8 {d2-d3}, [lr,:128]!
vld1.8 {d6}, [lr,:64]!
vld1.32 {d28[]}, [lr,:32]
sub lr, lr, #16
vld1.8 {d4-d5}, [lr]!
vld1.8 {d7}, [lr,:64]!
vld1.32 {d28[1]}, [lr,:32]
sub lr, lr, #16
vtrn.32 q1, q2
vtrn.32 d6, d7
vp8_epel8_v6_y2 d2, d3, d2, d4, d3, d5, d6, d7, d28
vst1.32 {d2[0]}, [r0,:32], r1
vst1.32 {d3[0]}, [r0,:32], r1
vst1.32 {d2[1]}, [r0,:32], r1
vst1.32 {d3[1]}, [r0,:32], r1
subs r12, r12, #4
bne 2b
add sp, sp, #52+16
pop {r4,pc}
endfunc
function ff_put_vp8_epel4_h6v4_neon, export=1
sub r2, r2, r3
sub r2, r2, #2
push {r4,lr}
ldr r4, [sp, #12] @ mx
movrel lr, subpel_filters-16
ldr r12, [sp, #8] @ h
add r4, lr, r4, lsl #4
sub sp, sp, #44+16
vld1.16 {q0}, [r4,:128]
add lr, sp, #15
add r12, r12, #3
bic lr, lr, #15
1:
vld1.8 {q1}, [r2], r3
vp8_epel8_h6 d2, d2, d3
vst1.32 {d2[0]}, [lr,:32]!
subs r12, r12, #1
bne 1b
ldr r4, [sp, #44+16+16] @ my
movrel lr, subpel_filters-16
ldr r12, [sp, #44+16+8] @ h
add r4, lr, r4, lsl #4
add lr, sp, #15
vld1.16 {q0}, [r4,:128]
bic lr, lr, #15
2:
vld1.8 {d2-d3}, [lr,:128]!
vld1.32 {d6[]}, [lr,:32]
sub lr, lr, #8
vld1.8 {d4-d5}, [lr]!
vld1.32 {d6[1]}, [lr,:32]
sub lr, lr, #8
vtrn.32 q1, q2
vp8_epel8_v4_y2 d2, d3, d2, d4, d3, d5, d6
vst1.32 {d2[0]}, [r0,:32], r1
vst1.32 {d3[0]}, [r0,:32], r1
vst1.32 {d2[1]}, [r0,:32], r1
vst1.32 {d3[1]}, [r0,:32], r1
subs r12, r12, #4
bne 2b
add sp, sp, #44+16
pop {r4,pc}
endfunc
function ff_put_vp8_epel4_h4_neon, export=1
sub r2, r2, #1
push {r4,lr}
ldr r4, [sp, #12] @ mx
movrel lr, subpel_filters-16
ldr r12, [sp, #8] @ h
add r4, lr, r4, lsl #4
vld1.16 {q0}, [r4,:128]
1:
vld1.8 {d2}, [r2], r3
vp8_epel8_h4 d2, d2, d2
vst1.32 {d2[0]}, [r0,:32], r1
subs r12, r12, #1
bne 1b
pop {r4,pc}
endfunc
function ff_put_vp8_epel4_v4_neon, export=1
sub r2, r2, r3
push {r4,lr}
ldr r4, [sp, #16] @ my
movrel lr, subpel_filters-16
ldr r12, [sp, #8] @ h
add r4, lr, r4, lsl #4
vld1.16 {q0}, [r4,:128]
1:
vld1.32 {d2[]}, [r2], r3
vld1.32 {d3[]}, [r2], r3
vld1.32 {d4[]}, [r2], r3
vld1.32 {d5[]}, [r2], r3
vld1.32 {d6[]}, [r2]
sub r2, r2, r3, lsl #1
vld1.32 {d2[1]}, [r2], r3
vld1.32 {d3[1]}, [r2], r3
vld1.32 {d4[1]}, [r2], r3
vld1.32 {d5[1]}, [r2], r3
vld1.32 {d6[1]}, [r2]
sub r2, r2, r3, lsl #1
vp8_epel8_v4_y2 d2, d3, d2, d3, d4, d5, d6
vst1.32 {d2[0]}, [r0,:32], r1
vst1.32 {d3[0]}, [r0,:32], r1
vst1.32 {d2[1]}, [r0,:32], r1
vst1.32 {d3[1]}, [r0,:32], r1
subs r12, r12, #4
bne 1b
pop {r4,pc}
endfunc
function ff_put_vp8_epel4_h4v4_neon, export=1
sub r2, r2, r3
sub r2, r2, #1
push {r4,lr}
ldr r4, [sp, #12] @ mx
movrel lr, subpel_filters-16
ldr r12, [sp, #8] @ h
add r4, lr, r4, lsl #4
sub sp, sp, #44+16
vld1.16 {q0}, [r4,:128]
add lr, sp, #15
add r12, r12, #3
bic lr, lr, #15
1:
vld1.8 {d2}, [r2], r3
vp8_epel8_h4 d2, d2, d3
vst1.32 {d2[0]}, [lr,:32]!
subs r12, r12, #1
bne 1b
ldr r4, [sp, #44+16+16] @ my
movrel lr, subpel_filters-16
ldr r12, [sp, #44+16+8] @ h
add r4, lr, r4, lsl #4
add lr, sp, #15
vld1.16 {q0}, [r4,:128]
bic lr, lr, #15
2:
vld1.8 {d2-d3}, [lr,:128]!
vld1.32 {d6[]}, [lr,:32]
sub lr, lr, #8
vld1.8 {d4-d5}, [lr]!
vld1.32 {d6[1]}, [lr,:32]
sub lr, lr, #8
vtrn.32 q1, q2
vp8_epel8_v4_y2 d2, d3, d2, d4, d3, d5, d6
vst1.32 {d2[0]}, [r0,:32], r1
vst1.32 {d3[0]}, [r0,:32], r1
vst1.32 {d2[1]}, [r0,:32], r1
vst1.32 {d3[1]}, [r0,:32], r1
subs r12, r12, #4
bne 2b
add sp, sp, #44+16
pop {r4,pc}
endfunc
@ note: worst case sum of all 6-tap filter values * 255 is 0x7f80 so 16 bit
@ arithmatic can be used to apply filters
const subpel_filters, align=4
.short 0, 6, 123, 12, 1, 0, 0, 0
.short 2, 11, 108, 36, 8, 1, 0, 0
.short 0, 9, 93, 50, 6, 0, 0, 0
.short 3, 16, 77, 77, 16, 3, 0, 0
.short 0, 6, 50, 93, 9, 0, 0, 0
.short 1, 8, 36, 108, 11, 2, 0, 0
.short 0, 1, 12, 123, 6, 0, 0, 0
endconst
/* Bilinear MC */
function ff_put_vp8_bilin16_h_neon, export=1
ldr r3, [sp, #4] @ mx
rsb r12, r3, #8
vdup.8 d0, r3
vdup.8 d1, r12
ldr r12, [sp] @ h
1:
subs r12, r12, #2
vld1.8 {d2-d4}, [r2], r1
vext.8 q2, q1, q2, #1
vmull.u8 q8, d2, d1
vmlal.u8 q8, d4, d0
vld1.8 {d18-d20},[r2], r1
vmull.u8 q3, d3, d1
vmlal.u8 q3, d5, d0
vext.8 q10, q9, q10, #1
vmull.u8 q11, d18, d1
vmlal.u8 q11, d20, d0
vmull.u8 q12, d19, d1
vmlal.u8 q12, d21, d0
vrshrn.u16 d4, q8, #3
vrshrn.u16 d5, q3, #3
vrshrn.u16 d6, q11, #3
vrshrn.u16 d7, q12, #3
vst1.8 {q2}, [r0,:128], r1
vst1.8 {q3}, [r0,:128], r1
bgt 1b
bx lr
endfunc
function ff_put_vp8_bilin16_v_neon, export=1
ldr r3, [sp, #8] @ my
rsb r12, r3, #8
vdup.8 d0, r3
vdup.8 d1, r12
ldr r12, [sp] @ h
vld1.8 {q1}, [r2], r1
1:
subs r12, r12, #2
vld1.8 {q2}, [r2], r1
vmull.u8 q3, d2, d1
vmlal.u8 q3, d4, d0
vmull.u8 q8, d3, d1
vmlal.u8 q8, d5, d0
vld1.8 {q1}, [r2], r1
vmull.u8 q9, d4, d1
vmlal.u8 q9, d2, d0
vmull.u8 q10, d5, d1
vmlal.u8 q10, d3, d0
vrshrn.u16 d4, q3, #3
vrshrn.u16 d5, q8, #3
vrshrn.u16 d6, q9, #3
vrshrn.u16 d7, q10, #3
vst1.8 {q2}, [r0,:128], r1
vst1.8 {q3}, [r0,:128], r1
bgt 1b
bx lr
endfunc
function ff_put_vp8_bilin16_hv_neon, export=1
ldr r3, [sp, #4] @ mx
rsb r12, r3, #8
vdup.8 d0, r3
vdup.8 d1, r12
ldr r3, [sp, #8] @ my
rsb r12, r3, #8
vdup.8 d2, r3
vdup.8 d3, r12
ldr r12, [sp] @ h
vld1.8 {d4-d6}, [r2], r1
vext.8 q3, q2, q3, #1
vmull.u8 q8, d4, d1
vmlal.u8 q8, d6, d0
vmull.u8 q9, d5, d1
vmlal.u8 q9, d7, d0
vrshrn.u16 d4, q8, #3
vrshrn.u16 d5, q9, #3
1:
subs r12, r12, #2
vld1.8 {d18-d20},[r2], r1
vext.8 q10, q9, q10, #1
vmull.u8 q11, d18, d1
vmlal.u8 q11, d20, d0
vld1.8 {d26-d28},[r2], r1
vmull.u8 q12, d19, d1
vmlal.u8 q12, d21, d0
vext.8 q14, q13, q14, #1
vmull.u8 q8, d26, d1
vmlal.u8 q8, d28, d0
vmull.u8 q9, d27, d1
vmlal.u8 q9, d29, d0
vrshrn.u16 d6, q11, #3
vrshrn.u16 d7, q12, #3
vmull.u8 q12, d4, d3
vmlal.u8 q12, d6, d2
vmull.u8 q15, d5, d3
vmlal.u8 q15, d7, d2
vrshrn.u16 d4, q8, #3
vrshrn.u16 d5, q9, #3
vmull.u8 q10, d6, d3
vmlal.u8 q10, d4, d2
vmull.u8 q11, d7, d3
vmlal.u8 q11, d5, d2
vrshrn.u16 d24, q12, #3
vrshrn.u16 d25, q15, #3
vst1.8 {q12}, [r0,:128], r1
vrshrn.u16 d20, q10, #3
vrshrn.u16 d21, q11, #3
vst1.8 {q10}, [r0,:128], r1
bgt 1b
bx lr
endfunc
function ff_put_vp8_bilin8_h_neon, export=1
ldr r3, [sp, #4] @ mx
rsb r12, r3, #8
vdup.8 d0, r3
vdup.8 d1, r12
ldr r12, [sp] @ h
1:
subs r12, r12, #2
vld1.8 {q1}, [r2], r1
vext.8 d3, d2, d3, #1
vmull.u8 q2, d2, d1
vmlal.u8 q2, d3, d0
vld1.8 {q3}, [r2], r1
vext.8 d7, d6, d7, #1
vmull.u8 q8, d6, d1
vmlal.u8 q8, d7, d0
vrshrn.u16 d4, q2, #3
vrshrn.u16 d16, q8, #3
vst1.8 {d4}, [r0,:64], r1
vst1.8 {d16}, [r0,:64], r1
bgt 1b
bx lr
endfunc
function ff_put_vp8_bilin8_v_neon, export=1
ldr r3, [sp, #8] @ my
rsb r12, r3, #8
vdup.8 d0, r3
vdup.8 d1, r12
ldr r12, [sp] @ h
vld1.8 {d2}, [r2], r1
1:
subs r12, r12, #2
vld1.8 {d3}, [r2], r1
vmull.u8 q2, d2, d1
vmlal.u8 q2, d3, d0
vld1.8 {d2}, [r2], r1
vmull.u8 q3, d3, d1
vmlal.u8 q3, d2, d0
vrshrn.u16 d4, q2, #3
vrshrn.u16 d6, q3, #3
vst1.8 {d4}, [r0,:64], r1
vst1.8 {d6}, [r0,:64], r1
bgt 1b
bx lr
endfunc
function ff_put_vp8_bilin8_hv_neon, export=1
ldr r3, [sp, #4] @ mx
rsb r12, r3, #8
vdup.8 d0, r3
vdup.8 d1, r12
ldr r3, [sp, #8] @ my
rsb r12, r3, #8
vdup.8 d2, r3
vdup.8 d3, r12
ldr r12, [sp] @ h
vld1.8 {q2}, [r2], r1
vext.8 d5, d4, d5, #1
vmull.u8 q9, d4, d1
vmlal.u8 q9, d5, d0
vrshrn.u16 d22, q9, #3
1:
subs r12, r12, #2
vld1.8 {q3}, [r2], r1
vext.8 d7, d6, d7, #1
vmull.u8 q8, d6, d1
vmlal.u8 q8, d7, d0
vld1.8 {q2}, [r2], r1
vext.8 d5, d4, d5, #1
vmull.u8 q9, d4, d1
vmlal.u8 q9, d5, d0
vrshrn.u16 d16, q8, #3
vmull.u8 q10, d22, d3
vmlal.u8 q10, d16, d2
vrshrn.u16 d22, q9, #3
vmull.u8 q12, d16, d3
vmlal.u8 q12, d22, d2
vrshrn.u16 d20, q10, #3
vst1.8 {d20}, [r0,:64], r1
vrshrn.u16 d23, q12, #3
vst1.8 {d23}, [r0,:64], r1
bgt 1b
bx lr
endfunc
function ff_put_vp8_bilin4_h_neon, export=1
ldr r3, [sp, #4] @ mx
rsb r12, r3, #8
vdup.8 d0, r3
vdup.8 d1, r12
ldr r12, [sp] @ h
1:
subs r12, r12, #2
vld1.8 {d2}, [r2], r1
vext.8 d3, d2, d3, #1
vld1.8 {d6}, [r2], r1
vext.8 d7, d6, d7, #1
vtrn.32 q1, q3
vmull.u8 q2, d2, d1
vmlal.u8 q2, d3, d0
vrshrn.u16 d4, q2, #3
vst1.32 {d4[0]}, [r0,:32], r1
vst1.32 {d4[1]}, [r0,:32], r1
bgt 1b
bx lr
endfunc
function ff_put_vp8_bilin4_v_neon, export=1
ldr r3, [sp, #8] @ my
rsb r12, r3, #8
vdup.8 d0, r3
vdup.8 d1, r12
ldr r12, [sp] @ h
vld1.32 {d2[]}, [r2], r1
1:
vld1.32 {d3[]}, [r2]
vld1.32 {d2[1]}, [r2], r1
vld1.32 {d3[1]}, [r2], r1
vmull.u8 q2, d2, d1
vmlal.u8 q2, d3, d0
vtrn.32 d3, d2
vrshrn.u16 d4, q2, #3
vst1.32 {d4[0]}, [r0,:32], r1
vst1.32 {d4[1]}, [r0,:32], r1
subs r12, r12, #2
bgt 1b
bx lr
endfunc
function ff_put_vp8_bilin4_hv_neon, export=1
ldr r3, [sp, #4] @ mx
rsb r12, r3, #8
vdup.8 d0, r3
vdup.8 d1, r12
ldr r3, [sp, #8] @ my
rsb r12, r3, #8
vdup.8 d2, r3
vdup.8 d3, r12
ldr r12, [sp] @ h
vld1.8 {d4}, [r2], r1
vext.8 d5, d4, d4, #1
vmull.u8 q9, d4, d1
vmlal.u8 q9, d5, d0
vrshrn.u16 d22, q9, #3
1:
subs r12, r12, #2
vld1.8 {d6}, [r2], r1
vext.8 d7, d6, d6, #1
vld1.8 {d4}, [r2], r1
vext.8 d5, d4, d4, #1
vtrn.32 q3, q2
vmull.u8 q8, d6, d1
vmlal.u8 q8, d7, d0
vrshrn.u16 d16, q8, #3
vmull.u8 q10, d16, d2
vtrn.32 d22, d16
vmlal.u8 q10, d22, d3
vrev64.32 d22, d16
vrshrn.u16 d20, q10, #3
vst1.32 {d20[0]}, [r0,:32], r1
vst1.32 {d20[1]}, [r0,:32], r1
bgt 1b
bx lr
endfunc
|
