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* Merge commit '64034849dad8410bedbe1def4c533490fb85cc4a'Hendrik Leppkes2016-01-021-4/+4
| | | | | | | * commit '64034849dad8410bedbe1def4c533490fb85cc4a': arm64: add cycle counter support Merged-by: Hendrik Leppkes <h.leppkes@gmail.com>
* arm64: add cycle counter supportJanne Grunau2015-12-141-0/+44
The ISB (instruction synchronization barrier) might be too heavy for START/STOPTIMER use but should be more accurate in checkasm where the timing overhead is subtracted.
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