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author | Michael Niedermayer <michaelni@gmx.at> | 2013-01-16 12:38:41 +0100 |
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committer | Michael Niedermayer <michaelni@gmx.at> | 2013-01-16 12:38:41 +0100 |
commit | 5c7e9e16c961f1f7258734426afac3cee4349580 (patch) | |
tree | 20ea7bec723ef262bffb8f2447adcc1dc3d98069 /libavutil/arm | |
parent | 0e79fe37e5c5500db2e65ce6b7ea0bbdb3f24665 (diff) | |
parent | e034cc6c60c77dce390b1ac31141b1862bdf8999 (diff) | |
download | ffmpeg-streaming-5c7e9e16c961f1f7258734426afac3cee4349580.zip ffmpeg-streaming-5c7e9e16c961f1f7258734426afac3cee4349580.tar.gz |
Merge remote-tracking branch 'qatar/master'
* qatar/master:
lavc: Move vector_fmul_window to AVFloatDSPContext
rtpdec_mpeg4: Check the remaining amount of data before reading
Conflicts:
libavcodec/dsputil.c
Merged-by: Michael Niedermayer <michaelni@gmx.at>
Diffstat (limited to 'libavutil/arm')
-rw-r--r-- | libavutil/arm/float_dsp_init_neon.c | 4 | ||||
-rw-r--r-- | libavutil/arm/float_dsp_neon.S | 47 |
2 files changed, 51 insertions, 0 deletions
diff --git a/libavutil/arm/float_dsp_init_neon.c b/libavutil/arm/float_dsp_init_neon.c index 88eb4b3..16ea471 100644 --- a/libavutil/arm/float_dsp_init_neon.c +++ b/libavutil/arm/float_dsp_init_neon.c @@ -32,9 +32,13 @@ void ff_vector_fmac_scalar_neon(float *dst, const float *src, float mul, void ff_vector_fmul_scalar_neon(float *dst, const float *src, float mul, int len); +void ff_vector_fmul_window_neon(float *dst, const float *src0, + const float *src1, const float *win, int len); + void ff_float_dsp_init_neon(AVFloatDSPContext *fdsp) { fdsp->vector_fmul = ff_vector_fmul_neon; fdsp->vector_fmac_scalar = ff_vector_fmac_scalar_neon; fdsp->vector_fmul_scalar = ff_vector_fmul_scalar_neon; + fdsp->vector_fmul_window = ff_vector_fmul_window_neon; } diff --git a/libavutil/arm/float_dsp_neon.S b/libavutil/arm/float_dsp_neon.S index 6d7bd52..540cfc6 100644 --- a/libavutil/arm/float_dsp_neon.S +++ b/libavutil/arm/float_dsp_neon.S @@ -146,3 +146,50 @@ NOVFP vdup.32 q8, r2 bx lr .unreq len endfunc + +function ff_vector_fmul_window_neon, export=1 + push {r4,r5,lr} + ldr lr, [sp, #12] + sub r2, r2, #8 + sub r5, lr, #2 + add r2, r2, r5, lsl #2 + add r4, r3, r5, lsl #3 + add ip, r0, r5, lsl #3 + mov r5, #-16 + vld1.32 {d0,d1}, [r1,:128]! + vld1.32 {d2,d3}, [r2,:128], r5 + vld1.32 {d4,d5}, [r3,:128]! + vld1.32 {d6,d7}, [r4,:128], r5 +1: subs lr, lr, #4 + vmul.f32 d22, d0, d4 + vrev64.32 q3, q3 + vmul.f32 d23, d1, d5 + vrev64.32 q1, q1 + vmul.f32 d20, d0, d7 + vmul.f32 d21, d1, d6 + beq 2f + vmla.f32 d22, d3, d7 + vld1.32 {d0,d1}, [r1,:128]! + vmla.f32 d23, d2, d6 + vld1.32 {d18,d19},[r2,:128], r5 + vmls.f32 d20, d3, d4 + vld1.32 {d24,d25},[r3,:128]! + vmls.f32 d21, d2, d5 + vld1.32 {d6,d7}, [r4,:128], r5 + vmov q1, q9 + vrev64.32 q11, q11 + vmov q2, q12 + vswp d22, d23 + vst1.32 {d20,d21},[r0,:128]! + vst1.32 {d22,d23},[ip,:128], r5 + b 1b +2: vmla.f32 d22, d3, d7 + vmla.f32 d23, d2, d6 + vmls.f32 d20, d3, d4 + vmls.f32 d21, d2, d5 + vrev64.32 q11, q11 + vswp d22, d23 + vst1.32 {d20,d21},[r0,:128]! + vst1.32 {d22,d23},[ip,:128], r5 + pop {r4,r5,pc} +endfunc |