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| author | Mans Rullgard <mans@mansr.com> | 2011-03-29 02:30:13 +0100 |
|---|---|---|
| committer | Mans Rullgard <mans@mansr.com> | 2011-03-29 19:40:13 +0100 |
| commit | d782bca4156cfd91cd3d9a7d4eda6ff580915170 (patch) | |
| tree | 2087bb0434b6b12be65d2660fafb4100f2c187bc /libavcodec | |
| parent | 6d9f52b2cd760eacf6cc6b7d694b0b00d991f1de (diff) | |
| download | ffmpeg-streaming-d782bca4156cfd91cd3d9a7d4eda6ff580915170.zip ffmpeg-streaming-d782bca4156cfd91cd3d9a7d4eda6ff580915170.tar.gz | |
ac3enc: NEON optimised float_to_fixed24
Signed-off-by: Mans Rullgard <mans@mansr.com>
Diffstat (limited to 'libavcodec')
| -rw-r--r-- | libavcodec/arm/ac3dsp_init_arm.c | 2 | ||||
| -rw-r--r-- | libavcodec/arm/ac3dsp_neon.S | 14 |
2 files changed, 16 insertions, 0 deletions
diff --git a/libavcodec/arm/ac3dsp_init_arm.c b/libavcodec/arm/ac3dsp_init_arm.c index 6874546..03200e6 100644 --- a/libavcodec/arm/ac3dsp_init_arm.c +++ b/libavcodec/arm/ac3dsp_init_arm.c @@ -27,6 +27,7 @@ void ff_ac3_exponent_min_neon(uint8_t *exp, int num_reuse_blocks, int nb_coefs); int ff_ac3_max_msb_abs_int16_neon(const int16_t *src, int len); void ff_ac3_lshift_int16_neon(int16_t *src, unsigned len, unsigned shift); void ff_ac3_rshift_int32_neon(int32_t *src, unsigned len, unsigned shift); +void ff_float_to_fixed24_neon(int32_t *dst, const float *src, unsigned int len); av_cold void ff_ac3dsp_init_arm(AC3DSPContext *c, int bit_exact) { @@ -35,5 +36,6 @@ av_cold void ff_ac3dsp_init_arm(AC3DSPContext *c, int bit_exact) c->ac3_max_msb_abs_int16 = ff_ac3_max_msb_abs_int16_neon; c->ac3_lshift_int16 = ff_ac3_lshift_int16_neon; c->ac3_rshift_int32 = ff_ac3_rshift_int32_neon; + c->float_to_fixed24 = ff_float_to_fixed24_neon; } } diff --git a/libavcodec/arm/ac3dsp_neon.S b/libavcodec/arm/ac3dsp_neon.S index 43d4e61..d33d978 100644 --- a/libavcodec/arm/ac3dsp_neon.S +++ b/libavcodec/arm/ac3dsp_neon.S @@ -78,3 +78,17 @@ function ff_ac3_rshift_int32_neon, export=1 bgt 1b bx lr endfunc + +function ff_float_to_fixed24_neon, export=1 +1: vld1.32 {q0-q1}, [r1,:128]! + vcvt.s32.f32 q0, q0, #24 + vld1.32 {q2-q3}, [r1,:128]! + vcvt.s32.f32 q1, q1, #24 + vcvt.s32.f32 q2, q2, #24 + vst1.32 {q0-q1}, [r0,:128]! + vcvt.s32.f32 q3, q3, #24 + vst1.32 {q2-q3}, [r0,:128]! + subs r2, r2, #16 + bgt 1b + bx lr +endfunc |
