summaryrefslogtreecommitdiffstats
path: root/src/mainboard/via/epia-n/acpi/pata_methods.asl
blob: 68d505868e27450a1e3b63a7a3d3c22cf0a549bf (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
/*
 * Minimalist ACPI DSDT table for EPIA-N / NL
 * Basic description of some hardware resources to allow
 * interrupt assignments to be done. This is expected to be included
 * into the PATA Device definition in ab_physical.asl
 * (C) Copyright 2009 Jon Harrison <jon.harrison@blueyonder.co.uk>
 *
 */

Name (TIM0, Package (0x07)
{
    Package (0x05)
    {
        0x78, 0xB4, 0xF0, 0x017F, 0x0258
    },

    Package (0x05)
    {
        0x20, 0x22, 0x33, 0x47, 0x5D
    },

    Package (0x05)
    {
        0x04, 0x03, 0x02, 0x01, 0x00
    },

    Package (0x04)
    {
        0x02, 0x01, 0x00, 0x00
    },

    Package (0x07)
    {
        0x78, 0x50, 0x3C, 0x2D, 0x1E, 0x14, 0x0F
    },

    Package (0x0F)
    {
        0x06, 0x05, 0x04, 0x04, 0x03, 0x03, 0x02, 0x02,
        0x01, 0x01, 0x01, 0x01, 0x01, 0x01,0x00
    },

    Package (0x07)
    {
        0x0E, 0x08, 0x06, 0x04, 0x02, 0x01, 0x00
    }
})


/* This method sets up the PATA Timing Control*/
/* Note that a lot of this is done in the     */
/* Coreboot VT8237R Init code, but this is    */
/* already getting very cluttered with board  */
/* specific code. Using ACPI will allow this  */
/* to be de-cluttered a bit (so long as we're */
/* running a ACPI Capable OS !!!)             */

Method (PMEX, 0, Serialized)
{
    If (REGF)
    {
		/* Check if these regs are still at defaults */
		/* Board specific timing improvement if not  */
		/* Already changed                           */
        If (LEqual (PMPT, 0xA8))
        {
            Store (0x5D, PMPT)
        }

        If (LEqual (PSPT, 0xA8))
        {
            Store (0x5D, PSPT)
        }

        If (LEqual (SMPT, 0xA8))
        {
            Store (0x5D, SMPT)
        }

        If (LEqual (SSPT, 0xA8))
        {
            Store (0x5D, SSPT)
        }

    }
}

/* This Method Provides the method that is used to */
/* Reset ATA Drives to POST reset condition        */
Method (GTF, 4, Serialized)
{
    Store (Buffer (0x07)
        {
            0x03, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF
        }, Local1)
    Store (Buffer (0x07)
        {
            0x03, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF
        }, Local2)
    CreateByteField (Local1, 0x01, MODE)
    CreateByteField (Local2, 0x01, UMOD)
    CreateByteField (Local1, 0x05, PCHA)
    CreateByteField (Local2, 0x05, UCHA)
    And (Arg0, 0x03, Local3)
    If (LEqual (And (Local3, 0x01), 0x01))
    {
        Store (0xB0, PCHA)
        Store (0xB0, UCHA)
    }

    If (Arg1)
    {
        Store (DerefOf (Index (DerefOf (Index (TIM0, 0x05)), Arg2)),
            UMOD)
        Or (UMOD, 0x40, UMOD)
    }
    Else
    {
        Store (Match (DerefOf (Index (TIM0, 0x01)), MEQ, Arg3, MTR,
            0x00, 0x00), Local0)
        Or (0x20, DerefOf (Index (DerefOf (Index (TIM0, 0x03)), Local0
            )), UMOD)
    }

    Store (Match (DerefOf (Index (TIM0, 0x01)), MEQ, Arg3, MTR,
        0x00, 0x00), Local0)
    Or (0x08, DerefOf (Index (DerefOf (Index (TIM0, 0x02)), Local0
        )), MODE)
    Concatenate (Local1, Local2, Local6)
    Return (Local6)
}

OpenPOWER on IntegriCloud