| Commit message (Collapse) | Author | Age | Files | Lines |
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Datasheet: http://www.fintek.com.tw/files/productfiles/F71869_V1.1.pdf
Practically the same as F71869AD, just another ID (0x1408).
Tested on actual hardware, Jetway NC9C-550-LF.
Update:
Fixed F71869ED based on the proper datasheet:
http://www.alldatasheet.com/datasheet-pdf/pdf/459075/FINTEK/F71869ED.html
Change-Id: I5da858565ca16ba4d73b47b42fadd31dabbc290b
Signed-off-by: Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com>
Reviewed-on: http://review.coreboot.org/5380
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
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Fixed F71869AD based on the proper datasheet:
http://www.alldatasheet.com/datasheet-pdf/pdf/459074/FINTEK/F71869AD.html
Change-Id: If22341551c6a1a9bbae088801a6194f7b5b6bf4d
Signed-off-by: Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com>
Reviewed-on: http://review.coreboot.org/5405
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
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This bothers rpmlint.
Change-Id: I27d9cfac3ef6834ff87acc5a5ccbf332e59eeb1a
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: http://review.coreboot.org/5075
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
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Change-Id: Ia2ce8214d8b419d0ca0186e6f6b2241097b0847b
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/4802
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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Change-Id: I9355996a8cf1b7cb91cc415ec04f5108a1cc42a5
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/3358
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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Change-Id: Iaea08b7eb5aac9ff1e0756f1400a82641bb45b14
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/3359
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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This commit adds "register dump capability" to
superiotool for a specific chip by Winbond/Nuvoton:
the W83627UHG AKA NCT6627UD (same chip, different package).
In other words, it fills in the "CR map" definitions in winbond.c,
which so far have been void for this chip.
-
superiotool r4.0-3976-g190011e
Found Winbond W83627UHG = NCT6627UD (id=0xa2, rev=0x32) at 0x2e
Register dump:
idx 02 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f
val ff a2 32 ff f0 44 00 00 ff 00 00 00 00 03 00 00 ff
def 00 a2 NA ff f0 MM 00 MM RR 00 00 00 00 02 00 00 00
LDN 0x00 (Floppy)
idx 30 60 61 70 74 f0 f1 f2 f4 f5
val 00 00 00 00 02 8e 00 ff 00 00
def 01 03 f0 06 02 8e 00 ff 00 00
LDN 0x01 (Parallel port)
idx 30 60 61 70 74 f0
val 00 03 78 0c 04 3f
def 01 03 78 07 04 3f
LDN 0x02 (UART A)
idx 30 60 61 70 f0
val 01 03 f8 04 00
def 01 03 f8 04 00
LDN 0x03 (UART B)
idx 30 60 61 70 f0 f1
val 01 02 f8 03 00 44
def 01 02 f8 03 00 00
LDN 0x05 (Keyboard)
idx 30 60 61 62 63 70 72 f0
val 01 00 60 00 64 01 0c 82
def 01 00 60 00 64 01 0c 83
LDN 0x06 (UART C)
idx 30 60 61 70 f0
val 01 03 e8 05 80
def 01 03 e0 04 00
LDN 0x07 (GPIO 3, GPIO 4)
idx 30 e0 e1 e2 e3 e4 e5 e6 e7
val 04 ff ff ff ff ff ff ff ff
def 00 ff 00 00 00 ff 00 00 00
LDN 0x08 (WDTO#, PLED, GPIO 5,6 & GPIO Base Address)
idx 30 60 61 e0 e1 e2 e3 e4 e5 e6 e7 f5 f6 f7
val 01 00 00 ff ff ff ff ff ff ff ff 02 00 00
def 02 00 00 ff 00 00 00 ff 1f 00 00 00 00 00
LDN 0x09 (GPIO 1, GPIO 2 and SUSLED)
idx 30 e0 e1 e2 e3 e4 e5 e6 e7 f3
val 02 ff ff ff ff 00 ff 00 00 00
def 00 ff 00 00 00 ff 00 00 00 00
LDN 0x0a (ACPI)
idx 30 70 e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 f2 f3 f4 f6 f7 fe
val 01 00 01 00 0a 00 00 00 0c 00 09 00 01 00 00 00 00 00
def 00 00 01 00 ff 08 00 00 1c 00 RR RR 3e 00 00 00 00 00
LDN 0x0b (Hardware monitor)
idx 30 60 61 70 f0 f1 f2
val 01 02 48 00 81 ff 81
def 00 00 00 00 RR RR 00
LDN 0x0c (PECI, SST)
idx e0 e1 e2 e3 e4 e5 e6 e7 e8 f1 f2 f3 fe ff
val 00 48 48 48 48 00 00 00 00 4c 50 10 23 5a
def 00 48 48 48 48 00 RR RR 00 48 50 10 23 5a
LDN 0x0d (UART D)
idx 30 60 61 70 f0
val 00 00 00 00 00
def 00 02 e0 03 00
LDN 0x0e (UART E)
idx 30 60 61 70 f0
val 00 00 00 00 80
def 00 03 e8 04 00
LDN 0x0f (UART F)
idx 30 60 61 70 f0
val 01 02 38 0a 00
def 00 02 e8 03 00
Change-Id: I834f8767b29f3148f353004edb22cfd7db5ddd56
Signed-off-by: Frank Rysanek <Frantisek.Rysanek@post.cz>
Reviewed-on: http://review.coreboot.org/3027
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
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directory line
Nico Huber spotted [1], that commit (4d6ab4e2) [1] updating
superiotools’s `README` with the Git command line
superiotool: Update README with Git repository URL and directory location
missed, that after `git clone` one sitll has to change into
the cloned directory.
So prepend the path with `coreboot/` to fix that. The same error
happened in the commit (e1ea5151) for libpayload [2]
libpayload: Update README with Git repository URL and directory location
and is fixed in this patch too.
[1] http://review.coreboot.org/#/c/3019/
[2] http://review.coreboot.org/2228
Change-Id: Ib6e8b678af6276556a40ccfd52ae35ca7e674455
Reported-by: Nico Huber <nico.h@gmx.de>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/3021
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.huber@secunet.com>
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Change-Id: I36d980cea5ca9cc67262dba809441091757e1fb5
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/3019
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
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This way for example a different compiler can easily be used.
CC=clang make
Change-Id: I50b83554fd4826d00d87e60a30eb1f6a88834397
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/2935
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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$ superiotool -d
superiotool r4.0-3712-gd549279
Found ITE IT8728F (id=0x8728, rev=0x1) at 0x2e
Register dump:
idx 02 07 20 21 22 23 24 2b 2e 2f
val 00 0a 87 28 01 00 00 40 00 00
def NA NA 87 28 01 00 00 MM 00 00
LDN 0x00 (Floppy)
idx 30 60 61 70 74 f0 f1
val 00 03 f0 06 02 00 00
def 00 03 f0 06 02 00 00
LDN 0x01 (COM1)
idx 30 60 61 70 f0 f1
val 01 03 f8 04 00 50
def 00 03 f8 04 00 50
LDN 0x02 (COM2)
idx 30 60 61 70 f0 f1
val 00 02 f8 03 00 50
def 00 02 f8 03 00 50
LDN 0x03 (Parallel port)
idx 30 60 61 62 63 70 74 f0
val 01 03 78 00 00 07 04 08
def 00 03 78 07 78 07 03 03
LDN 0x04 (Environment controller)
idx 30 60 61 62 63 70 f0 f1 f2 f3 f4 f5 f6 f9 fa fb
val 01 0a 30 0a 20 09 00 80 00 00 20 00 f0 48 00 00
def 00 02 90 02 30 09 00 00 00 00 00 MM MM MM MM MM
LDN 0x05 (Keyboard)
idx 30 60 61 62 63 70 71 f0
val 01 00 60 00 64 01 02 08
def 01 00 60 00 64 01 02 48
LDN 0x06 (Mouse)
idx 30 70 71 f0
val 01 0c 02 00
def 00 0c 02 00
LDN 0x07 (GPIO)
idx 25 26 27 28 29 2a 2c 2d 60 61 62 63 64 65 70 71 72 73 74 b0 b1 b2 b3 b4 b8 b9 ba bb bc bd c0 c1 c2 c3 c4 c8 c9 ca cb cc cd ce cf e0 e1 e2 e3 e4 e9 f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb
val 00 f3 10 00 00 00 80 00 00 00 0a 00 00 00 00 00 20 00 00 00 00 00 00 00 20 00 00 00 00 00 01 00 00 40 00 01 00 00 00 00 00 00 00 00 00 00 00 00 21 10 42 00 00 00 00 1c 00 00 00 00 00
def 00 f3 00 00 00 00 03 00 00 00 00 00 00 00 00 00 20 38 00 00 00 00 00 00 20 00 00 00 00 00 01 00 00 40 00 01 00 00 40 00 00 00 00 00 00 00 00 00 MM 00 00 00 00 00 00 00 00 00 00 00 00
LDN 0x0a (Consumer IR)
idx 30 60 61 70 f0
val 00 03 10 0b 06
def 00 03 10 0b 06
Change-Id: Ifb45d28005d78b2a99d8552b59154d11bdf44f6f
Signed-off-by: Андрей Павлов <7134956@gmail.com>
Reviewed-on: http://review.coreboot.org/2775
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
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In the file `COPYING` in the coreboot repository and upstream [1]
just one space is used.
The following command was used to convert all files.
$ git grep -l 'MA 02' | xargs sed -i 's/MA 02/MA 02/'
[1] http://www.gnu.org/licenses/gpl-2.0.txt
Change-Id: Ic956dab2820a9e2ccb7841cab66966ba168f305f
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/2490
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
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Makefile still used SVNDEF on FreeBSD.
Change-Id: I45c7fbc66c33e82a2146ef7df87b63bc7edea4cd
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1554
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
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Datasheet: http://www.fintek.com.tw/files/productfiles/F81865_V028P.pdf
The code was done by Juha Tuomala <Juha.Tuomala@iki.fi> but he refused
to sign it off, or commit it for review. I'll commit it anyway with my sign-off
because it does not exceed threshold of originality for any copyright.
Change-Id: Id86267f5add539b99229f20bbe339bfb5eb20f8b
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: http://review.coreboot.org/1496
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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Add support to dump all data registers for Nuvoton chips (NCT6775F, NCT6776F,
and NCT6779D). Register contents will be dumped if the -e option is provided on
the command line.
Change-Id: I2b425b48c1f28a10ff3c1ca1d7f21c501eff74ad
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-on: http://review.coreboot.org/1150
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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Add new function dump_data() to dump a bank of superio data registers.
Change-Id: I13a58d87c14d319cfcdea1ec1d54c2b110d90f9f
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-on: http://review.coreboot.org/1149
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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Change-Id: I66667fcb58f6885460021f4a2024d6ba56b95f11
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-on: http://review.coreboot.org/1148
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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The superiotool Makefile extracts a version string from SVN. This does not work
with a git repository, and results in an empty version string. Use the output of
'git describe' as version string instead.
Change-Id: Idf92c02753b28ef5bcdd3b6df4a08d79ae974434
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-on: http://review.coreboot.org/1151
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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no dumping yet
Change-Id: I4e687ca816c8d6d1c95255b0abf6a19513e23f86
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/734
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
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Omitted from commit 3d1d6bb4ecb15a12f48f871c623882bee9c0c576
Change-Id: Id3e94d615d50f0673cc5e3fde77ed6748d26ebd3
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Reviewed-on: http://review.coreboot.org/514
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: build bot (Jenkins)
Reviewed-by: Philip Prindeville <pprindeville@gmail.com>
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Change-Id: If94ea5f45135a4b65bdd37532851fa0ba864bb73
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/421
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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Change-Id: Ibfb3af4c5d7675a5d4e27021cbb988c2ce00fd9f
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/420
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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The current code exits config mode of the NCT6776F immediately after
detection, so the register dump shows all 0xffs. This patch adds code to
re-enter config mode for the register dump so that the register contents
can be read.
Change-Id: I4ad0c108b6411a665e31f55dea4b91ca77d1a5f7
Signed-off-by: Florian Zumbiehl <florz@florz.de>
Reviewed-on: http://review.coreboot.org/391
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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Change-Id: Ib91889a374515d36a2b12b53aeb12b6ea6e22732
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/364
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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This patch adds support to dump SIO like interface of AMD Embedded Controller
in the SB7xx and SB8xxx southbridges. Parts of the register interface are
documented in SBxxx RRG BDG.
Change-Id: Ib2ccaa3dfe33cfa8e7cba19d8ab0798286ad2f92
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Reviewed-on: http://review.coreboot.org/343
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
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Older libpci version have headers using 'long long' which isn't allowed
in ANSI C. Since we cannot control the libpci version installed in the
system nor in generall have complete control over system headers, simply
skip using -Werror in our makefile.
Change-Id: Ibc1e57bef033bf4971f4108d078222dcf168d5e3
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Reviewed-on: http://review.coreboot.org/210
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
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This has been tested on a Aaeon PFM-540I RevB PC104 SBC.
Change-Id: Ie02875a1fa2d90d7cc843ce745f727312f7b7aec
Signed-off-by: Mark Norman <mpnorman@gmail.com>
Reviewed-on: http://review.coreboot.org/43
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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Change-Id: Iacda2a9e37635d5cffc5004caf588ef3e5e09b5e
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://review.coreboot.org/18
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
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Signed-off-by: Stefan Reinauer <reinauer@google.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6543 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6542 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Note that the registers and their defaults are mostly based on educated
guessing, due to the lack of datasheet.
Signed-off-by: Ruud Schramp <schramp@holmes.nl>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6484 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add support for detecting/dumping the registers of Nuvoton W83627DHG-P/-PT.
This is a different chip than the Winbond W83627DHG (different IDs).
Signed-off-by: Prakash Punnoor <prakash@punnoor.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6468 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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were not dumped by superiotool. This patch adds those registers to the dump.
Signed-off-by: Prakash Punnoor <prakash@punnoor.de>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6460 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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See http://www.coreboot.org/DirectHW for more information
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6454 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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superiotool -deV output:
http://www.flashrom.org/pipermail/flashrom/2011-March/005878.html
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6433 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This patch also disables FDC37M81x since it has a conflicting device ID
and is not supported very well anyway.
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Stefan Reinauer <reinauer@google.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6370 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Christian Ruppert <idl0r@gentoo.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6331 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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It is a rather small 'Super I/O' device, containing a serial port, IR,
GPIO, and a Docking LPC switch. It is used in various Thinkpads.
Add 0x164e/0x16ef to the list of probed ports for NSC chips, as
Thinkpads are using this address pair.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6327 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Tested on hardware by me.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6235 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6226 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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another port.
Only skip probing if chip was found on the same port already to avoid
duplicates.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6222 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6205 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The datasheet is available on nuvoton's website.
http://www.nuvoton.com/NuvotonMOSS/Community/ProductInfo.aspx?
tp_GUID=cf73485c-9e0a-4218-9bee-89dfe9a7bb87
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6179 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Running result.
superiotool r6131
Found Winbond W83527HG (id=0xb0, rev=0x73) at 0x2e
The documentation is not available yet.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6169 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The patch was tested by a user on IRC who had the F71889FG. I
wrote it using documentation from Fintek's website available here:
http://www.fintek.com.tw/files/productfiles/F71889_V0.28P.pdf
This patch also seems to work for the F71889ED, which uses 0x09 and 0x09 for
chip ID bytes 1 & 2. However, I have not been able to find documentation to
verify that the two chips are identical from superiotool's perspective.
Signed-off-by: David Hendricks <dhendrix@google.com>
Signed-off-by: Alec Ari <neotheuser@ymail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6131 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6024 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5984 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Jonathan Kollasch <jakllsch@kollasch.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5983 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5980 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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