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path: root/src/southbridge/intel/i3100
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* coreboot has 13 instances of IOAPIC setup distributed across a lotStefan Reinauer2010-01-161-55/+14
* Remove default n statements to simplify .config and ldoptions files.Myles Watson2009-10-091-1/+0
* some progress on kconfig:Patrick Georgi2009-09-252-0/+12
* This patch adds VGA and PS/2 Keyboard/mouse support to the already existing i...Arnaud Maye2009-08-281-0/+3
* Move the v3 resource allocator to v2.Myles Watson2009-07-021-3/+14
* Add support for the Intel Eagle Heights development board.Thomas Jourdan2009-07-015-38/+270
* Revert "CMOS: Add set_option and rework get_option."Luc Verhaegen2009-06-031-2/+2
* CMOS: Add set_option and rework get_option.Luc Verhaegen2009-06-031-2/+2
* coreboot-v2: drop this ugly historic union name in v2 that was dropped in v3Stefan Reinauer2009-02-282-3/+3
* Tidy up identifiers, per Uwe's suggestion. Trivial.Ed Swierk2008-09-031-4/+4
* This patch adds PCI device IDs for the Intel EP80579 Integrated Processor,Ed Swierk2008-08-252-7/+7
* This patch modifies the Intel 3100 southbridge code to recognize theEd Swierk2008-08-255-0/+34
* Implement GPIO configuration routines for the Intel 3100 southbridge,Ed Swierk2008-05-071-13/+103
* By default, the Intel 3100 LPC interface enables only I/O range 0x3f8Ed Swierk2008-04-301-0/+1
* Setting an integrated southbridge device (like SATA or USB2.0) toEd Swierk2008-04-012-38/+32
* Tiny style fix for consistency (trivial).Ed Swierk2008-04-011-1/+1
* The early init code of several Intel southbridge chipsets callsEd Swierk2008-04-012-18/+4
* Like other Intel chipsets, the Intel 3100 has a TCO timer that rebootsEd Swierk2008-03-302-1/+21
* Here is an updated patch addressing most of Uwe's and Peter's ...Ed Swierk2008-03-1614-0/+1035
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