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path: root/src/mainboard/google/bolt
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* haswell: Move to per-device ACPIVladimir Serbinenko2014-09-221-167/+1
* azalia: Shrink boilerplateVladimir Serbinenko2014-09-132-10/+7
* Consolidate intel vga int15 hooksVladimir Serbinenko2014-09-052-93/+3
* azalia: Use convenience macros throughoutVladimir Serbinenko2014-09-051-44/+27
* Remove dead video.aslVladimir Serbinenko2014-08-221-42/+0
* azalia: Move shared variable to separate fileVladimir Serbinenko2014-08-181-3/+1
* Haswell: Lower TJ_MAX to 100C. Adjust critical temps to match.ChromeOS Developer2014-08-121-5/+5
* bolt: Set GPIO29 as input in S0, output+high in S3/S5Duncan Laurie2014-08-102-1/+25
* mainboard: Trivial - drop trailing blank lines at EOFEdward O'Callaghan2014-07-181-2/+0
* mainboard,ASL: Trivial - drop trailing blank lines at EOFEdward O'Callaghan2014-07-173-3/+0
* mainboard: Trivial - drop trailing blank lines at EOF in .hEdward O'Callaghan2014-07-081-1/+0
* mainboard: Trivial - drop trailing blank lines at EOFEdward O'Callaghan2014-07-081-1/+0
* Intel Lynx Point boards: Kconfig: Add `HAVE_ME_BIN`Paul Menzel2014-07-051-0/+4
* Intel Lynx Point boards: Kconfig: Add `HAVE_IFD_BIN`Paul Menzel2014-07-051-0/+4
* intel boards: Use acpi_is_wakeup_s3()Kyösti Mälkki2014-06-211-1/+1
* ACPI: Remove CBMEM TOC from GNVSKyösti Mälkki2014-06-181-3/+0
* mainboard/google/bolt: Fix usage of GNU field designator extEdward O'Callaghan2014-05-251-22/+22
* Add aliases for Chromebooks in board_infoKyösti Mälkki2014-05-191-0/+4
* ChromeOS boards: Always build code for bootmode strapsKyösti Mälkki2014-05-081-2/+2
* Declare get_write_protect_state() without ChromeOSKyösti Mälkki2014-05-081-1/+1
* Move ARCH_* from board/Kconfig to cpu or soc Kconfig.Furquan Shaikh2014-05-031-1/+0
* ChromeOS: Use common fill_lb_gpio()Kyösti Mälkki2014-05-011-15/+0
* ChromeOS: Remove oprom_is_loadedKyösti Mälkki2014-05-011-1/+1
* mainboard/*/*/ec.c: Do not include `chromeos/chromeos.h`Paul Menzel2014-03-281-1/+0
* Remove CACHE_ROM.Vladimir Serbinenko2014-02-251-1/+0
* google boards: Do not hardcode location of spd.binAlexandru Gagniuc2014-02-121-1/+0
* MTRR: Mark all prefetchable resources as WRCOMB.Vladimir Serbinenko2014-02-061-1/+0
* board_info.txt: Classify almost all remaining boards.Vladimir Serbinenko2014-01-221-0/+1
* CBFS: use cbfs_get_file_content whenever possible rather than cbfs_get_fileVladimir Serbinenko2014-01-121-5/+7
* Remove PCI_ROM_RUN optionVladimir Serbinenko2013-12-241-3/+3
* Coding style: punctuation cleanup [1/2].Idwer Vollering2013-12-231-1/+1
* haswell boards: Use PECI temp sensor id 0Duncan Laurie2013-12-211-1/+1
* bolt: make the gpio interrupts edge sensitiveAaron Durbin2013-12-211-2/+2
* bolt: Initial mainboard commitDuncan Laurie2013-12-1228-0/+2589
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