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* vboot: use only offsets for tracking firmware componentsAaron Durbin2015-05-267-95/+105
| | | | | | | | | | | | | | Because of the fmap API returning pointers to represent regions within the boot device a vboot_region structure was used to track the case where offsets could be pointers on x86 but not on !x86. Normalize this tracking to use offsets only as it provides consistency in the code. Change-Id: I63c08b31ace3bd0e66ebc17e308f87eb5f857c86 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/10221 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* cbfs: remove unused CBFS_HEADER_ROM_OFFSET optionAaron Durbin2015-05-262-10/+0
| | | | | | | | | | | The CBFS_HEADER_ROM_OFFSET went away. Remove remaining defintions that are not used. Change-Id: Ibedce988143f0b7167cea1b27de5b33698b5d82b Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/10217 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* coreboot: introduce boot_deviceAaron Durbin2015-05-2624-417/+670
| | | | | | | | | | | | | | | | | | The boot_device is a region_device that represents the device from which coreboot retrieves and boots its stages. The existing cbfs implementations use the boot_device as the intermediary for accessing the CBFS region. Also, there's currently only support for a read-only view of the boot_device. i.e. one cannot write to the boot_device using this view. However, a writable boot_device could be added in the future. Change-Id: Ic0da796ab161b8025c90631be3423ba6473ad31c Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/10216 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* pistashio: bump up romstage sizeAaron Durbin2015-05-261-2/+2
| | | | | | | | | | | | Making large changes in pieces is leading to a little bloat. Bump up the romstage size temporarily so that jenkins will be happy. Change-Id: I6f9facb4ca488cf41741a3ed6d0ed7f66d4778b3 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/10220 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* Make acpi_fill_hest into parameterVladimir Serbinenko2015-05-2610-24/+21
| | | | | | | | | | | This avoids the need to supply weak function and avoids associated risks of forgetting to link in relevant files. Change-Id: Ie96475babb4aa4ea8db49023af5b31bfa63b21dc Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7373 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
* acpigen: Remove all explicit length trackingVladimir Serbinenko2015-05-267-315/+212
| | | | | | | | Change-Id: I88248d78c01b4b4e42a097889b5f4ddfdac3d966 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7367 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
* acpigen: Remove acpigen_patch_lenVladimir Serbinenko2015-05-262-13/+1
| | | | | | | | Change-Id: I77276342b3f44c7c845a10682ff1f15599c4c721 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7365 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
* pcengines/apu1: Enable HAVE_ACPI_RESUMEKyösti Mälkki2015-05-261-1/+1
| | | | | | | | | | | | Note: apu1c models do not support this. That we expose S3 in ACPI table while it is not available, is a wider issue to solve. Change-Id: I9b07550d0523593f51c1882a40cccd783115057b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10315 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* AGESA: Halt on S3 resume failureKyösti Mälkki2015-05-261-8/+10
| | | | | | | | Change-Id: Ib6ac8ab3aca991fa623fedcd87a20470248d58e4 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10298 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
* AGESA: Split S3 support fileKyösti Mälkki2015-05-263-129/+139
| | | | | | | | | | | | Separate it to low-memory backup in romstage and MTRR recovery in ramstage. How much of the MTRR part we really need will be resolved later. Change-Id: Ic64b3f74cf6ef0954eda6e84754745de81c465b2 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8607 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
* AGESA: Refactor OEM S3 storageKyösti Mälkki2015-05-265-91/+112
| | | | | | | | | | | Use function prototypes that match more closely with the structure of other OEM hooks in agesawrappers. Change-Id: Id241fdce78a21a5138ef60ac2f841b694da92241 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8606 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
* AGESA: Move S3 related SPI writes againKyösti Mälkki2015-05-266-85/+89
| | | | | | | | | | | This is more agesawrapper-related code than CPU. Change-Id: I3058ef965a83aed1972e02f0f566f81d5dbd7adf Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10295 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
* cbmem: remove cbmem_set_top()Aaron Durbin2015-05-263-18/+0
| | | | | | | | | | | | | Now that the users of cbmem_set_top() always provide a consistent cbmem_top() value there's no need to have cbmem_set_top() around. Therefore, delete it. Change-Id: I0c96e2b8b829eddbeb1fdf755ed59c51ea689d1b Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/10314 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
* CBMEM console: Fix buffer without EARLY_CBMEM_INITKyösti Mälkki2015-05-262-6/+3
| | | | | | | | | | | | | | | On S3 resume, CBMEM_ID_CONSOLE from previous boot is found in ramstage, even when romstage did not create it. So buffer did not get cleared on S3 resume path. Also do not allocate for preram_cbmem_console in CAR when there are no means to back it up to ram. Change-Id: I175cebbb938adf2a7414703fefffb8da796e9fa9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10301 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
* timestamp: Fix collection without EARLY_CBMEM_INITKyösti Mälkki2015-05-261-5/+5
| | | | | | | | | | | | | | | | With LATE_CBMEM_INIT, do not search for the initial collection from CBMEM in ramstage. On S3 resume this would find the non-empty collection from previous run of ramstage. Start with an empty table instead. Remove a spurious error message as the stamps get stashed and will be copied to CBMEM later. Change-Id: Ib94049531c0ac23af25407bd2ca7644ee0163d69 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10300 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* CBMEM: Fix S3 resume path without EARLY_CBMEM_INITKyösti Mälkki2015-05-262-12/+4
| | | | | | | | | | | | | | | | Implementation for cbmem_find() did not work for boards without EARLY_CBMEM_INIT in romstage. This is required for S3 resume to work on AGESA plaforms. First broken with commit 0dff57d cbmem: switch over to imd-based cbmem Change-Id: I9c1a4f6839f5d90f825787baad2a3824a04b5bdc Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10299 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
* x86: provide consistent cbmem_top() for CONFIG_LATE_CBMEM_INITAaron Durbin2015-05-262-1/+22
| | | | | | | | | | | | | | | | | For x86 systems employing CONFIG_LATE_CBMEM_INIT, set_top_of_ram() is called in ramstage to note the upper address of the 32-bit address space. This in turn is consumed by cbmem. However, in this scenario cbmem_top() cannot always be relied upon because get_top_of_ram() doesn't return the same value provided to set_top_of_ram(). To fix the inconsistency in ramstage save the value passed in to set_top_of_ram() and defer to it as the return value for cbmem_top(). Change-Id: Ida796fb836c59b9776019e7f8b3f2cd71156f0e5 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/10313 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins)
* consoles: remove unused infrastructureAaron Durbin2015-05-263-38/+0
| | | | | | | | | | | | The __console attribute as well as linker binding was dropped at some point. Kill of the dead code and infrastructure. Change-Id: I15e1fb4468fffe2e148ec9ac8539dfd958551807 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/10279 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
* AGESA f16kb: Fix PCI device notationFabian Kunkel2015-05-261-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | Old file defines wrong PCI devices (1.2 2.2 3.2 4.2 5.2). Wrong defines cause PCI devices not to be found in the pirq_data table. Example error output: PCI IRQ: Found device 0:02.01 using PIN A PCI Devfn (0x11) not found in pirq_data table PCI IRQ: Found device 0:02.02 using PIN B Found this device in pirq_data table entry 3 Orig INT_PIN : 2 (PIN B) PCI_INTR idx : 0x02 (INTC# ) INT_LINE : 0xA (IRQ 10) PCI IRQ: Found device 0:02.03 using PIN C PCI Devfn (0x13) not found in pirq_data table PCI IRQ: Found device 0:02.04 using PIN D PCI Devfn (0x14) not found in pirq_data table PCI IRQ: Found device 0:02.05 using PIN A PCI Devfn (0x15) not found in pirq_data table Patch fixes, that pirq_data entries for pci devices 2.1 - 2.5 get found. Change-Id: I4503433427f4ec90d022b65084c52077ba4f3511 Signed-off-by: Fabian Kunkel <fabi@adv.bruhnspace.com> Reviewed-on: http://review.coreboot.org/10289 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
* speedstep: Don't supply weak get_cst_entries.Vladimir Serbinenko2015-05-2615-13/+56
| | | | | | | | | | | This should be overriden by mobo even if it's no-op override. weak function in this case would only hide real problems. Change-Id: I30dd671eb605b490a51153d00ae308c4bdef3d05 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7368 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* ACPI: slic supportVladimir Serbinenko2015-05-267-75/+43
| | | | | | | | | | Export SLIC table from file in CBFS. Change-Id: Id0e7fe0a49b9cd50b5e43cd15030e1c2098728ec Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7202 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
* gm45: Link cstates.c rather than including it.Vladimir Serbinenko2015-05-264-6/+3
| | | | | | | | | | | The comment about necessity of include isn't true anymore as get_cst_entries is not weak anymore so if it's not found, the linking would fail. Change-Id: I4bf88208d63ac3e625f464c3907e2e1ea575dd9f Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7375 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
* acpi: Remove monolithic ACPIVladimir Serbinenko2015-05-2647-87/+16
| | | | | | | | | | | All boards now use per-device ACPI. This patch finishes migration by removing transitional kludges. Change-Id: Ie4577f89bf3bb17b310b7b0a84b2c54e404b1606 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7372 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
* bd82x6x: Merge common platform ASL code.Vladimir Serbinenko2015-05-2635-646/+91
| | | | | | | | | | | This code in reality just describes the southbridge features, don't put a copy in every mainboard. Change-Id: I8cf3019a36b1ae6a17d502e7508f36ea9fa62830 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/10231 Reviewed-by: Nicolas Reinecke <nr@das-labor.org> Tested-by: build bot (Jenkins)
* cbfstool: update fmd_scanner.c_shippedPatrick Georgi2015-05-261-6/+6
| | | | | | | | | | We updated the source files, but not the precompiled results. Change-Id: I49634409d01c8d7cf841944e01d36571ae66c0ac Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/10296 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
* build system: only query the compiler runtime's location oncePatrick Georgi2015-05-261-2/+2
| | | | | | | | | | | | No need to execute the compiler to figure this out once for each source file (or so). Change-Id: I56bf084f1217b96748296931617e9233f21183d5 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/10294 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* cbfstool: Make update-fit action work on new-style imagesSol Boucher2015-05-263-29/+65
| | | | | | | | | | | | | | | | Because new images place the bootblock in a separate region from the primary CBFS, performing an update-fit operation requires reading an additional section and choosing a different destination for the write based on the image type. Since other actions are not affected by these requirements, the logic for the optional read and all writing is implemented in the cbfs_update_fit() function itself, rather than relying on the main() function for writing as the other actions do. Change-Id: I2024c59715120ecc3b9b158e007ebce75acff023 Signed-off-by: Sol Boucher <solb@chromium.org> Reviewed-on: http://review.coreboot.org/10137 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* gitignore: Have multiple crossgcc versionsKyösti Mälkki2015-05-251-0/+2
| | | | | | | | | | Make it so that git does not remove old copies or the symlink. Change-Id: I27be60c897d2f86cdf274480c83cbbfe38fcdf94 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10292 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* inteltool: dump gfx registers.Vladimir Serbinenko2015-05-254-5/+88
| | | | | | | | | | Useful for autoport and other gfx-related developpement. Change-Id: I1fc0952bc30ab15cd39a4f0c00649714dcf318f3 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/10276 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Deppenwiese <zaolin@das-labor.org>
* VBT parser.Vladimir Serbinenko2015-05-251-0/+536
| | | | | | | | Change-Id: I32f6505dbf683478bf5a25b73db7ab0c60eff29c Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5842 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* build system: drop generic util/ %.c -> %.o rulePatrick Georgi2015-05-251-4/+0
| | | | | | | | | | It shouldn't be necessary because tools should give their own rules. Change-Id: I8654afaf4f64a14a73677d9901562f7d962f0404 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/10290 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
* binaryPI boards: Minor fixups to unify boardsKyösti Mälkki2015-05-246-13/+15
| | | | | | | | | | Some missing static declarations and whitespace on the console. Change-Id: I1af59dbfb1396297bd671b43d9326dffdd7f59d4 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10284 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
* AGESA binaryPI boards: Drop annoying commentaryKyösti Mälkki2015-05-2422-114/+112
| | | | | | | | | | Same comments were already removed for the latest board, the amd/lamar. Change-Id: Ie244f838409c567c11f7444c9cf17de72e49dbb0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10283 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
* baytrail: Switch to per-device ACPIVladimir Serbinenko2015-05-2317-761/+148
| | | | | | | | | Change-Id: I6a1b1daa291298c85e14f89aa47a0693837cec6f Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7037 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com> Reviewed-by: Aaron Durbin <adurbin@gmail.com>
* Hide TPM_TIS_BASE_ADDRESSVladimir Serbinenko2015-05-231-1/+1
| | | | | | | | | | TPM_TIS_BASE_ADDRESS is technical setting, shouldn't be user-visible. Change-Id: Ibf74f52be16fb7d2cfa78419087a4c3e7607368a Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/10271 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Deppenwiese <zaolin@das-labor.org>
* AGESA fam15x fam16x: Remove HAVE_ACPI_RESUMEKyösti Mälkki2015-05-2313-13/+0
| | | | | | | | | | | | Implementation corrupts low-memory on S3 resume path, rendering OS unstable. AMD was never able to pinpoint a revision that did not have the issue. Change-Id: I9656ac1bfe1412775a6152b9f995c4d4ebf57159 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10285 Reviewed-by: Rudolf Marek <r.marek@assembler.cz> Tested-by: build bot (Jenkins)
* AGESA: Drop CPU_SOCKET_TYPEKyösti Mälkki2015-05-237-28/+0
| | | | | | | | | | | Not referenced anywhere. Change-Id: I5d1dd8d712d5443f30c96043c223d2fc844b587f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10282 Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com> Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* AGESA: Drop EXT_RT_TBL_SUPPORTKyösti Mälkki2015-05-239-36/+0
| | | | | | | | | | | Not referenced anywhere. Change-Id: I66c5f2948145666721c9033b82f23f7c37ac1884 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10281 Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com> Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* AGESA: Drop DIMM_SUPPORT, _DDR3 and _REGISTEREDKyösti Mälkki2015-05-239-59/+0
| | | | | | | | | | | | Not referenced anywhere. Change-Id: I57180ccfab93e45df9982d08bad71834a04eb9f9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/10280 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* Braswell: Use Baytrail as Comparison BaseLee Leahy2015-05-2392-0/+14329
| | | | | | | | | | | | | | Add baytrail source for comparison with Braswell. BRANCH=none BUG=None TEST=None Change-Id: I5170addf41676d95a3daf070a32bcee085f8156d Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/10117 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* drivers/intel: Update FSP 1.1 DriverLee Leahy2015-05-2312-657/+1600
| | | | | | | | | | | | | | | | | | | | | Update the FSP driver files from 1.0 to 1.1. Updates will occur manually to these files only for FSP 1.1 support. An fsp_x_y should be added in the future to support newer versions of the FSP specification. Please note that due to the interface with EDK2, these files make references to data structures and fields that use CamelCase. BRANCH=none BUG=None TEST=Build for Braswell or Skylake boards using FSP 1.1. Change-Id: I2914c047d786a3060075356783ac9758bc41f633 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/10049 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* MAINTAINERS: grab build system responsibilityPatrick Georgi2015-05-221-0/+8
| | | | | | | | | | | Since nobody else stepped up, I hereby claim responsibility for the build system. Change-Id: I580b906d15fc2f049f0072e7b4608b1f19db83ab Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/10277 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* Kill ENABLE_TPM.Vladimir Serbinenko2015-05-214-96/+0
| | | | | | | | | | | It's used only in P470 and lynxpoint machines. Remove it from other southbridges. New machines should use src/drivers/pc80/tpm. Change-Id: I4741e76df4c6204d65562f016abac9ed60558432 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/10268 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* Remove address from GPLv2 headersPatrick Georgi2015-05-215495-6111/+5496
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As per discussion with lawyers[tm], it's not a good idea to shorten the license header too much - not for legal reasons but because there are tools that look for them, and giving them a standard pattern simplifies things. However, we got confirmation that we don't have to update every file ever added to coreboot whenever the FSF gets a new lease, but can drop the address instead. util/kconfig is excluded because that's imported code that we may want to synchronize every now and then. $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} + $ find * -type f -a \! -name \*.patch \ -a \! -name \*_shipped \ -a \! -name LICENSE_GPL \ -a \! -name LGPL.txt \ -a \! -name COPYING \ -a \! -name DISCLAIMER \ -exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} + Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9233 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
* lenovo: Remerge smbios_mainboard_bios_version.Vladimir Serbinenko2015-05-2111-152/+15
| | | | | | | | Change-Id: I8df5b7f6707957b925f7bb4dc06a717252c70868 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/10275 Reviewed-by: Nicolas Reinecke <nr@das-labor.org> Tested-by: build bot (Jenkins)
* util/board_status: Fetch and rebase after failed pushPaul Menzel2015-05-211-1/+9
| | | | | | | | | | | | | | | | | | | | | | Currently, when the remote master branch of the board-status repository changes between cloning and pushing, `git push origin` fails. This race condition happens quite often with REACTS testing commits at the same time on different systems. If that happens, just download the objects and refs from the board-status repository and rebase the local changes on it. Try that three times before exiting with an error message. Change-Id: I628ebce54895f44be6232b622d56acbcc421b847 Helped-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Helped-by: Patrick Georgi <pgeorgi@google.com> Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/10262 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
* Remove unused functionsPatrick Georgi2015-05-216-72/+0
| | | | | | | | | | | | acpi_fill_slit and acpi_fill_srat were removed in commit 5e597572e. Take care of the boards that were added in the mean time. Change-Id: I907e51de5d4ce9acfcce82e6bb30eefff312d35d Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/10266 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
* util/board_status: Add `echo` before message stringPaul Menzel2015-05-201-1/+1
| | | | | | | | | | | Fix up commit 1b6e7a67 (Updates to the board status script) forgetting to put `echo` in front of the string. Change-Id: I7d4dfcc62545dfee2073410ba47489318a9bf5c6 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/10265 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
* acpi: make fill_slit and fill_srat into arguments.Vladimir Serbinenko2015-05-2057-647/+44
| | | | | | | | | | | SLIT and SRAT are created this way only on amdk8 and amdfam10. This saves the need of having a lot of dummies. Change-Id: I76d042702209cd6d11ee78ac22cf9fe9d30d0ca5 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7052 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* riscv: enable function and data sectionsAaron Durbin2015-05-201-0/+1
| | | | | | | | | | | | | Every other arch we support has these options enabled. Enable it to make everything a lot easier in compiling common code. Change-Id: I86205468bbd793fbd377e471a1d32be617af5302 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/10258 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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