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-rw-r--r--util/x86emu/x86emu/prim_ops.c46
1 files changed, 46 insertions, 0 deletions
diff --git a/util/x86emu/x86emu/prim_ops.c b/util/x86emu/x86emu/prim_ops.c
index a4a46a2..20e7597 100644
--- a/util/x86emu/x86emu/prim_ops.c
+++ b/util/x86emu/x86emu/prim_ops.c
@@ -2448,3 +2448,49 @@ DB( if (CHECK_SP_ACCESS())
return res;
}
+/****************************************************************************
+REMARKS:
+CPUID takes EAX/ECX as inputs, writes EAX/EBX/ECX/EDX as output
+****************************************************************************/
+void x86emu_cpuid(void)
+{
+ u32 feature = M.x86.R_EAX;
+
+ switch (feature) {
+ case 0:
+ /* Regardless if we have real data from the hardware, the emulator
+ * will only support upto feature 1, which we set in register EAX.
+ * Registers EBX:EDX:ECX contain a string identifying the CPU.
+ */
+ M.x86.R_EAX = 1;
+ /* EBX:EDX:ECX = "GenuineIntel" */
+ M.x86.R_EBX = 0x756e6547;
+ M.x86.R_EDX = 0x49656e69;
+ M.x86.R_ECX = 0x6c65746e;
+ break;
+ case 1:
+ /* If we don't have x86 compatible hardware, we return values from an
+ * Intel 486dx4; which was one of the first processors to have CPUID.
+ */
+ M.x86.R_EAX = 0x00000480;
+ M.x86.R_EBX = 0x00000000;
+ M.x86.R_ECX = 0x00000000;
+ M.x86.R_EDX = 0x00000002; /* VME */
+ /* In the case that we have hardware CPUID instruction, we make sure
+ * that the features reported are limited to TSC and VME.
+ */
+ M.x86.R_EDX &= 0x00000012;
+ break;
+ default:
+ /* Finally, we don't support any additional features. Most CPUs
+ * return all zeros when queried for invalid or unsupported feature
+ * numbers.
+ */
+ M.x86.R_EAX = 0;
+ M.x86.R_EBX = 0;
+ M.x86.R_ECX = 0;
+ M.x86.R_EDX = 0;
+ break;
+ }
+}
+
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