diff options
| -rw-r--r-- | src/southbridge/amd/sb700/early_setup.c | 6 | ||||
| -rw-r--r-- | src/southbridge/amd/sb700/lpc.c | 2 |
2 files changed, 1 insertions, 7 deletions
diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c index 4a3a5a8..25fb5ef 100644 --- a/src/southbridge/amd/sb700/early_setup.c +++ b/src/southbridge/amd/sb700/early_setup.c @@ -621,11 +621,7 @@ static void sb700_pmio_por_init(void) byte |= 1 << 0; pmio_write(0xB2, byte); - // FIXME: Enabling this causes boot to hang while initializing processors. -// /* Enable automatic C1e state switch */ -// byte = pmio_read(0xc9); -// byte |= 0x11; -// pmio_write(0xc9, byte); + /* NOTE: Enabling automatic C1e state switch caused failures when initializing processors */ /* Enable precision HPET clock and automatic C state switch */ byte = pmio_read(0xbb); diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c index 145a01f..8f286d7 100644 --- a/src/southbridge/amd/sb700/lpc.c +++ b/src/southbridge/amd/sb700/lpc.c @@ -87,13 +87,11 @@ static void lpc_init(device_t dev) cmos_check_update_date(); } -#if (!IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) int acpi_get_sleep_type(void) { u16 tmp = inw(ACPI_PM1_CNT_BLK); return ((tmp & (7 << 10)) >> 10); } -#endif #if IS_ENABLED(CONFIG_LATE_CBMEM_INIT) void backup_top_of_ram(uint64_t ramtop) |
