AMD AGESA: Fix argument list for `PCIE_DDI_DATA_INITIALIZER` in comments

When looking into possible reasons for a proposed revert [1], I noticed
that the comments use four arguments for `PCIE_DDI_DATA_INITIALIZER`,
but the actual definition only uses three.

    $ git grep -A1 PCIE_DDI_DATA_INITIALIZER # manually squeeze whitespace in output
    […]
    --
    src/vendorcode/amd/agesa/f10/AGESA.h:#define  PCIE_DDI_DATA_INITIALIZER(mConnectorType, mAuxIndex, mHpdIndex ) \
    src/vendorcode/amd/agesa/f10/AGESA.h-{mConnectorType, mAuxIndex, mHpdIndex}
    --
    src/vendorcode/amd/agesa/f10/AGESA.h:   *      PCIE_DDI_DATA_INITIALIZER (ConnectorType
    src/vendorcode/amd/agesa/f10/AGESA.h-   *    },
    --
    src/vendorcode/amd/agesa/f10/AGESA.h:   *      PCIE_DDI_DATA_INITIALIZER (ConnectorType
    src/vendorcode/amd/agesa/f10/AGESA.h-   *    }
    --
    […]

So remove the fourth argument in the comments. Luckily the compiler,
at least gcc, warns about a wrong number of arguments, and therefore
no incorrect code resulted from the wrong documentation.

[1] http://review.coreboot.org/#/c/3077/

Change-Id: I3e5a02c66a23af1eb2d86be8dbc7aaa3e5cea05e
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/3080
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

7 files changed, 26 insertions, 26 deletions

diff --git a/src/vendorcode/amd/agesa/f10/AGESA.h b/src/vendorcode/amd/agesa/f10/AGESA.h
index c50086d..e6f5cfb 100644
--- a/src/vendorcode/amd/agesa/f10/AGESA.h
+++ b/src/vendorcode/amd/agesa/f10/AGESA.h
@@ -792,13 +792,13 @@ typedef struct {
                                                         *    {
                                                         *      0,   //Descriptor flags
                                                         *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 24, 27),
-                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux1, Hdp1, 0)
+                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux1, Hdp1)
                                                         *    },
                                                         *    // Initialize Ddi descriptor (DDI interface Lanes 28:31, HDMI, ...)
                                                         *    {
                                                         *      DESCRIPTOR_TERMINATE_LIST, //Descriptor flags  !!!IMPORTANT!!! Terminate last element of array
                                                         *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 28, 31),
-                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeHDMI, Aux2, Hdp2, 0)
+                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeHDMI, Aux2, Hdp2)
                                                         *    }
                                                         *  };
                                                         * PCIe_COMPLEX_DESCRIPTOR PlatformTopology = {
diff --git a/src/vendorcode/amd/agesa/f14/AGESA.h b/src/vendorcode/amd/agesa/f14/AGESA.h
index 3333976..2a9bed1 100644
--- a/src/vendorcode/amd/agesa/f14/AGESA.h
+++ b/src/vendorcode/amd/agesa/f14/AGESA.h
@@ -905,13 +905,13 @@ typedef struct {
                                                         *    {
                                                         *      0,   //Descriptor flags
                                                         *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 24, 27),
-                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux1, Hdp1, 0)
+                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux1, Hdp1)
                                                         *    },
                                                         *    // Initialize Ddi descriptor (DDI interface Lanes 28:31, HDMI, ...)
                                                         *    {
                                                         *      DESCRIPTOR_TERMINATE_LIST, //Descriptor flags  !!!IMPORTANT!!! Terminate last element of array
                                                         *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 28, 31),
-                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeHDMI, Aux2, Hdp2, 0)
+                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeHDMI, Aux2, Hdp2)
                                                         *    }
                                                         *  };
                                                         * PCIe_COMPLEX_DESCRIPTOR PlatformTopology = {
diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/GnbPage.h b/src/vendorcode/amd/agesa/f14/Proc/GNB/GnbPage.h
index fec1603..ecc9ca6 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/GNB/GnbPage.h
+++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/GnbPage.h
@@ -121,7 +121,7 @@
  *    {
  *      DESCRIPTOR_TERMINATE_LIST,   //Descriptor flags
  *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 24, 32),
- *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1, 0)
+ *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1)
  *    }
  *  }
  * // Dual Link DVI on dedicated display lanes. DP0_TXP/N[0]..DP0_TXP/N[3] - master, DP1_TXP/N[0]..DP1_TXP/N[3] - slave.
@@ -129,7 +129,7 @@
  *    {
  *      DESCRIPTOR_TERMINATE_LIST,   //Descriptor flags
  *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 32, 24),
- *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1, 0)
+ *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1)
  *    }
  *  }
  * // Dual Link DVI on PCIe lanes. P_GFX_TXP/N[0]..P_GFX_TXP/N[3] - master, P_GFX_TXP/N[4]..P_GFX_TXP/N[7] - slave.
@@ -137,7 +137,7 @@
  *    {
  *      DESCRIPTOR_TERMINATE_LIST,   //Descriptor flags
  *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 8, 15),
- *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1, 0)
+ *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1)
  *    }
  *  }
  * // Dual Link DVI on PCIe lanes. P_GFX_TXP/N[7]..P_GFX_TXP/N[4] - master, P_GFX_TXP/N[0]..P_GFX_TXP/N[3] - slave.
@@ -145,7 +145,7 @@
  *    {
  *      DESCRIPTOR_TERMINATE_LIST,   //Descriptor flags
  *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 15, 8),
- *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1, 0)
+ *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1)
  *    }
  *  }
  * // Dual Link DVI on PCIe lanes. P_GFX_TXP/N[8]..P_GFX_TXP/N[11] - master, P_GFX_TXP/N[12]..P_GFX_TXP/N[15] - slave.
@@ -153,7 +153,7 @@
  *    {
  *      DESCRIPTOR_TERMINATE_LIST,   //Descriptor flags
  *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 16, 23),
- *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1, 0)
+ *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1)
  *    }
  *  }
  * // Dual Link DVI on PCIe lanes. P_GFX_TXP/N[12]..P_GFX_TXP/N[15] - master, P_GFX_TXP/N[8]..P_GFX_TXP/N[11] - slave.
@@ -161,7 +161,7 @@
  *    {
  *      DESCRIPTOR_TERMINATE_LIST,   //Descriptor flags
  *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 23, 16),
- *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1, 0)
+ *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1)
  *    }
  *  }
  * @endcode
diff --git a/src/vendorcode/amd/agesa/f15/AGESA.h b/src/vendorcode/amd/agesa/f15/AGESA.h
index b18659e..6b0171b 100644
--- a/src/vendorcode/amd/agesa/f15/AGESA.h
+++ b/src/vendorcode/amd/agesa/f15/AGESA.h
@@ -1173,13 +1173,13 @@ typedef struct {
                                                         *    {
                                                         *      0,   //Descriptor flags
                                                         *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 24, 27),
-                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux1, Hdp1, 0)
+                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux1, Hdp1)
                                                         *    },
                                                         *    // Initialize Ddi descriptor (DDI interface Lanes 28:31, HDMI, ...)
                                                         *    {
                                                         *      DESCRIPTOR_TERMINATE_LIST, //Descriptor flags  !!!IMPORTANT!!! Terminate last element of array
                                                         *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 28, 31),
-                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeHDMI, Aux2, Hdp2, 0)
+                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeHDMI, Aux2, Hdp2)
                                                         *    }
                                                         *  };
                                                         * PCIe_COMPLEX_DESCRIPTOR PlatformTopology = {
diff --git a/src/vendorcode/amd/agesa/f15/Include/GnbPage.h b/src/vendorcode/amd/agesa/f15/Include/GnbPage.h
index 2ccdfc5..b571128 100644
--- a/src/vendorcode/amd/agesa/f15/Include/GnbPage.h
+++ b/src/vendorcode/amd/agesa/f15/Include/GnbPage.h
@@ -139,7 +139,7 @@
  *    {
  *      DESCRIPTOR_TERMINATE_LIST,   //Descriptor flags
  *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 24, 32),
- *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1, 0)
+ *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1)
  *    }
  *  }
  * // Dual Link DVI on dedicated display lanes. DP0_TXP/N[0]..DP0_TXP/N[3] - master, DP1_TXP/N[0]..DP1_TXP/N[3] - slave.
@@ -147,7 +147,7 @@
  *    {
  *      DESCRIPTOR_TERMINATE_LIST,   //Descriptor flags
  *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 32, 24),
- *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1, 0)
+ *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1)
  *    }
  *  }
  * // Dual Link DVI on PCIe lanes. P_GFX_TXP/N[0]..P_GFX_TXP/N[3] - master, P_GFX_TXP/N[4]..P_GFX_TXP/N[7] - slave.
@@ -155,7 +155,7 @@
  *    {
  *      DESCRIPTOR_TERMINATE_LIST,   //Descriptor flags
  *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 8, 15),
- *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1, 0)
+ *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1)
  *    }
  *  }
  * // Dual Link DVI on PCIe lanes. P_GFX_TXP/N[7]..P_GFX_TXP/N[4] - master, P_GFX_TXP/N[0]..P_GFX_TXP/N[3] - slave.
@@ -163,7 +163,7 @@
  *    {
  *      DESCRIPTOR_TERMINATE_LIST,   //Descriptor flags
  *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 15, 8),
- *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1, 0)
+ *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1)
  *    }
  *  }
  * // Dual Link DVI on PCIe lanes. P_GFX_TXP/N[8]..P_GFX_TXP/N[11] - master, P_GFX_TXP/N[12]..P_GFX_TXP/N[15] - slave.
@@ -171,7 +171,7 @@
  *    {
  *      DESCRIPTOR_TERMINATE_LIST,   //Descriptor flags
  *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 16, 23),
- *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1, 0)
+ *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1)
  *    }
  *  }
  * // Dual Link DVI on PCIe lanes. P_GFX_TXP/N[12]..P_GFX_TXP/N[15] - master, P_GFX_TXP/N[8]..P_GFX_TXP/N[11] - slave.
@@ -179,7 +179,7 @@
  *    {
  *      DESCRIPTOR_TERMINATE_LIST,   //Descriptor flags
  *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 23, 16),
- *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1, 0)
+ *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1)
  *    }
  *  }
  * @endcode
diff --git a/src/vendorcode/amd/agesa/f15tn/AGESA.h b/src/vendorcode/amd/agesa/f15tn/AGESA.h
index fdd02df..9bd2e88 100644
--- a/src/vendorcode/amd/agesa/f15tn/AGESA.h
+++ b/src/vendorcode/amd/agesa/f15tn/AGESA.h
@@ -1299,13 +1299,13 @@ typedef struct {
                                                         *    {
                                                         *      0,   //Descriptor flags
                                                         *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 24, 27),
-                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux1, Hdp1, 0)
+                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux1, Hdp1)
                                                         *    },
                                                         *    // Initialize Ddi descriptor (DDI interface Lanes 28:31, HDMI, ...)
                                                         *    {
                                                         *      DESCRIPTOR_TERMINATE_LIST, //Descriptor flags  !!!IMPORTANT!!! Terminate last element of array
                                                         *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 28, 31),
-                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeHDMI, Aux2, Hdp2, 0)
+                                                        *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeHDMI, Aux2, Hdp2)
                                                         *    }
                                                         *  };
                                                         * PCIe_COMPLEX_DESCRIPTOR PlatformTopology = {
diff --git a/src/vendorcode/amd/agesa/f15tn/Include/GnbPage.h b/src/vendorcode/amd/agesa/f15tn/Include/GnbPage.h
index 9c051c5..aae2e40 100644
--- a/src/vendorcode/amd/agesa/f15tn/Include/GnbPage.h
+++ b/src/vendorcode/amd/agesa/f15tn/Include/GnbPage.h
@@ -166,7 +166,7 @@
  *    {
  *      DESCRIPTOR_TERMINATE_LIST,   //Descriptor flags
  *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 24, 32),
- *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1, 0)
+ *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1)
  *    }
  *  }
  * // Dual Link DVI on dedicated display lanes. DP0_TXP/N[0]..DP0_TXP/N[3] - master, DP1_TXP/N[0]..DP1_TXP/N[3] - slave.
@@ -174,7 +174,7 @@
  *    {
  *      DESCRIPTOR_TERMINATE_LIST,   //Descriptor flags
  *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 32, 24),
- *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1, 0)
+ *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1)
  *    }
  *  }
  * // Dual Link DVI on PCIe lanes. P_GFX_TXP/N[0]..P_GFX_TXP/N[3] - master, P_GFX_TXP/N[4]..P_GFX_TXP/N[7] - slave.
@@ -182,7 +182,7 @@
  *    {
  *      DESCRIPTOR_TERMINATE_LIST,   //Descriptor flags
  *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 8, 15),
- *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1, 0)
+ *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1)
  *    }
  *  }
  * // Dual Link DVI on PCIe lanes. P_GFX_TXP/N[7]..P_GFX_TXP/N[4] - master, P_GFX_TXP/N[0]..P_GFX_TXP/N[3] - slave.
@@ -190,7 +190,7 @@
  *    {
  *      DESCRIPTOR_TERMINATE_LIST,   //Descriptor flags
  *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 15, 8),
- *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1, 0)
+ *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1)
  *    }
  *  }
  * // Dual Link DVI on PCIe lanes. P_GFX_TXP/N[8]..P_GFX_TXP/N[11] - master, P_GFX_TXP/N[12]..P_GFX_TXP/N[15] - slave.
@@ -198,7 +198,7 @@
  *    {
  *      DESCRIPTOR_TERMINATE_LIST,   //Descriptor flags
  *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 16, 23),
- *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1, 0)
+ *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1)
  *    }
  *  }
  * // Dual Link DVI on PCIe lanes. P_GFX_TXP/N[12]..P_GFX_TXP/N[15] - master, P_GFX_TXP/N[8]..P_GFX_TXP/N[11] - slave.
@@ -206,7 +206,7 @@
  *    {
  *      DESCRIPTOR_TERMINATE_LIST,   //Descriptor flags
  *      PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 23, 16),
- *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1, 0)
+ *      PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDualLinkDvi, Aux1, Hdp1)
  *    }
  *  }
  * @endcode