summaryrefslogtreecommitdiffstats
path: root/src/superio/NSC/pc87366/superio.c
diff options
context:
space:
mode:
authorEric Biederman <ebiederm@xmission.com>2004-10-21 10:44:08 +0000
committerEric Biederman <ebiederm@xmission.com>2004-10-21 10:44:08 +0000
commitdbec2d4090e40d1d8e1fd06e8d4180d3fa685d4d (patch)
treee813d3f9dea80d35cbc29d6bf35995fec0a06ab9 /src/superio/NSC/pc87366/superio.c
parentf3aa4707d3bef9f529a70a204dbc648968cf7c20 (diff)
downloadcoreboot-staging-dbec2d4090e40d1d8e1fd06e8d4180d3fa685d4d.zip
coreboot-staging-dbec2d4090e40d1d8e1fd06e8d4180d3fa685d4d.tar.gz
- Bump the LinuxBIOS major version
- Rename chip_config chip_operations throughout the tree - Fix Config.lb on most of the Opteron Ports - Fix the amd 8000 chipset support for setting the subsystem vendor and device ids - Add detection of devices that are on the motherboard (i.e. In Config.lb) - Baby step in getting the resource limit handling correct, Ignore fixed resources - Only call enable_childrens_resources on devices we know will have children For some busses like i2c it is non-sense and we don't want it. - Set the resource limits for pnp devices resources. - Improve the resource size detection for pnp devices. - Added a configuration register to amd8111_ide.c so we can enable/disable individual ide channels - Added a header file to hold the prototype of isa_dma_init - Fixed most of the superio chips so the should work now, the via superio pci device is the exception. - The code compiles and runs so it is time for me to go to bed. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/superio/NSC/pc87366/superio.c')
-rw-r--r--src/superio/NSC/pc87366/superio.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/src/superio/NSC/pc87366/superio.c b/src/superio/NSC/pc87366/superio.c
index 0d1f878..6b8db55 100644
--- a/src/superio/NSC/pc87366/superio.c
+++ b/src/superio/NSC/pc87366/superio.c
@@ -23,19 +23,19 @@ static void init(device_t dev)
if (!dev->enabled) {
return;
}
- conf = dev->chip->chip_info;
+ conf = dev->chip_info;
switch(dev->path.u.pnp.device) {
case PC87366_SP1:
- res0 = get_resource(dev, PNP_IDX_IO0);
+ res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com1);
break;
case PC87366_SP2:
- res0 = get_resource(dev, PNP_IDX_IO0);
+ res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com2);
break;
case PC87366_KBCK:
- res0 = get_resource(dev, PNP_IDX_IO0);
- res1 = get_resource(dev, PNP_IDX_IO1);
+ res0 = find_resource(dev, PNP_IDX_IO0);
+ res1 = find_resource(dev, PNP_IDX_IO1);
init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
break;
}
@@ -64,13 +64,13 @@ static struct pnp_info pnp_dev_info[] = {
};
-static void enumerate(struct chip *chip)
+static void enable_dev(struct device *dev)
{
- pnp_enumerate(chip, sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]),
- &pnp_ops, pnp_dev_info);
+ pnp_enable_device(dev, &pnp_ops,
+ sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
}
-struct chip_control superio_NSC_pc87366_control = {
- .enumerate = enumerate,
- .name = "NSC 87366"
+struct chip_operations superio_NSC_pc87366_control = {
+ .enable_dev = enable_dev,
+ .name = "NSC 87366"
};
OpenPOWER on IntegriCloud