diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2009-07-21 21:50:34 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2009-07-21 21:50:34 +0000 |
| commit | 573f7d40be086b35b25d242818ae0e9c26d05022 (patch) | |
| tree | 831bf36c8294b2dd1362af4e6de3b3f0df0fff50 /src/southbridge/intel/i82801gx/i82801gx_usb_debug.c | |
| parent | 71a3d96bc487f66c84ac869a1215b8a4a4499bf2 (diff) | |
| download | coreboot-staging-573f7d40be086b35b25d242818ae0e9c26d05022.zip coreboot-staging-573f7d40be086b35b25d242818ae0e9c26d05022.tar.gz | |
Intel ICH7 updates
- code restructuring (move ich7 out of i945)
- ACPI fixes
- major SMI handler updates
- make sure SMBus lives where we expect it
- try to get usb debug working
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4456 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801gx/i82801gx_usb_debug.c')
| -rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx_usb_debug.c | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c b/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c index be524ca..9460a34 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c +++ b/src/southbridge/intel/i82801gx/i82801gx_usb_debug.c @@ -21,16 +21,26 @@ #define EHCI_BAR 0xFEF00000 // These could be read from DEBUG_BASE (0:1d.7 R 0x5A 16bit) #define EHCI_BAR_INDEX 0x10 + +#define EHCI_CONFIG_FLAG 0x40 +#define EHCI_PORTSC 0x44 #define EHCI_DEBUG_OFFSET 0xA0 -static void set_debug_port(unsigned port) +void set_debug_port(unsigned port) { - // Nothing for now? + u32 dbgctl; + + printk_debug("Enabling OWNER_CNT\n"); + dbgctl = readl(EHCI_BAR + EHCI_DEBUG_OFFSET); + dbgctl |= (1 << 30); + writel(dbgctl, EHCI_BAR + EHCI_DEBUG_OFFSET); + } static void i82801gx_enable_usbdebug_direct(unsigned port) { pci_write_config32(PCI_DEV(0, 0x1d, 7), EHCI_BAR_INDEX, EHCI_BAR); pci_write_config8(PCI_DEV(0, 0x1d, 7), 0x04, 0x2); // Memory Space Enable + set_debug_port(port); } |
