diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2009-01-20 22:53:10 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2009-01-20 22:53:10 +0000 |
| commit | 54309d637ac2cf474793b884b5392f0a6e5390a9 (patch) | |
| tree | 7d7acb4cb7b4e394ba29eef08c553bd34aeb1193 /src/southbridge/intel/i82801gx/i82801gx_pcie.c | |
| parent | 977ed2d99565fc35c52f50cbe310b7b211611e94 (diff) | |
| download | coreboot-staging-54309d637ac2cf474793b884b5392f0a6e5390a9.zip coreboot-staging-54309d637ac2cf474793b884b5392f0a6e5390a9.tar.gz | |
Update Kontron board
- use new features of the ich7 update
- move rambase above 1M to avoid memory trashing through SMM relocation
- enable superio HWM
Update ICH7 driver
- minor smi cosmetics (in progress)
- add real ac97 driver
- add real azalia driver
- fix some interrupt issues
- fix some sata issues
- include Patrick's fix for _lpc.c
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3886 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801gx/i82801gx_pcie.c')
| -rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx_pcie.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx_pcie.c b/src/southbridge/intel/i82801gx/i82801gx_pcie.c index d984a6a..882c3e4 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_pcie.c +++ b/src/southbridge/intel/i82801gx/i82801gx_pcie.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2008 coresystems GmbH + * Copyright (C) 2008-2009 coresystems GmbH * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -53,13 +53,13 @@ static void pci_init(struct device *dev) pci_write_config16(dev, 0x1e, reg16); reg32 = pci_read_config32(dev, 0x20); - printk_debug(" MBL = 0x%08x\n", reg32); + printk_spew(" MBL = 0x%08x\n", reg32); reg32 = pci_read_config32(dev, 0x24); - printk_debug(" PMBL = 0x%08x\n", reg32); + printk_spew(" PMBL = 0x%08x\n", reg32); reg32 = pci_read_config32(dev, 0x28); - printk_debug(" PMBU32 = 0x%08x\n", reg32); + printk_spew(" PMBU32 = 0x%08x\n", reg32); reg32 = pci_read_config32(dev, 0x2c); - printk_debug(" PMLU32 = 0x%08x\n", reg32); + printk_spew(" PMLU32 = 0x%08x\n", reg32); } static void set_subsystem(device_t dev, unsigned vendor, unsigned device) |
