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| author | Stefan Reinauer <stepan@coresystems.de> | 2009-08-12 16:08:05 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2009-08-12 16:08:05 +0000 |
| commit | 109ab317e7544c3290700b83240849629d769494 (patch) | |
| tree | 8eee0ef8d269e21ecb2d585c74f35c85982aeeef /src/southbridge/intel/i82801gx/i82801gx_pcie.c | |
| parent | fd4519b5ef086fbec60041570c6c9d73d6a80a79 (diff) | |
| download | coreboot-staging-109ab317e7544c3290700b83240849629d769494.zip coreboot-staging-109ab317e7544c3290700b83240849629d769494.tar.gz | |
drop extra whitespace at end of line for i945 + ICH7 (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4538 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801gx/i82801gx_pcie.c')
| -rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx_pcie.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx_pcie.c b/src/southbridge/intel/i82801gx/i82801gx_pcie.c index d7655c5..67120d6 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_pcie.c +++ b/src/southbridge/intel/i82801gx/i82801gx_pcie.c @@ -29,7 +29,7 @@ static void pci_init(struct device *dev) u32 reg32; printk_debug("Initializing ICH7 PCIe bridge.\n"); - + /* Enable Bus Master */ reg32 = pci_read_config32(dev, PCI_COMMAND); reg32 |= PCI_COMMAND_MASTER; |
