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author | Stefan Reinauer <stepan@coresystems.de> | 2009-07-21 21:50:34 +0000 |
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committer | Stefan Reinauer <stepan@openbios.org> | 2009-07-21 21:50:34 +0000 |
commit | 573f7d40be086b35b25d242818ae0e9c26d05022 (patch) | |
tree | 831bf36c8294b2dd1362af4e6de3b3f0df0fff50 /src/southbridge/intel/i82801gx/i82801gx_pci.c | |
parent | 71a3d96bc487f66c84ac869a1215b8a4a4499bf2 (diff) | |
download | coreboot-staging-573f7d40be086b35b25d242818ae0e9c26d05022.zip coreboot-staging-573f7d40be086b35b25d242818ae0e9c26d05022.tar.gz |
Intel ICH7 updates
- code restructuring (move ich7 out of i945)
- ACPI fixes
- major SMI handler updates
- make sure SMBus lives where we expect it
- try to get usb debug working
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4456 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801gx/i82801gx_pci.c')
-rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx_pci.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx_pci.c b/src/southbridge/intel/i82801gx/i82801gx_pci.c index bf252ec..2e1a251 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_pci.c +++ b/src/southbridge/intel/i82801gx/i82801gx_pci.c @@ -81,7 +81,7 @@ static void ich_pci_dev_enable_resources(struct device *dev) command = pci_read_config16(dev, PCI_COMMAND); command |= dev->command; -#if PCI_BRIDGE_UPDATE_COMMAND +#ifdef PCI_BRIDGE_UPDATE_COMMAND /* If we write to PCI_COMMAND, on some systems * this will cause the ROM and APICs not being visible * anymore. |