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| author | Stefan Reinauer <stepan@coresystems.de> | 2009-01-20 22:53:10 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2009-01-20 22:53:10 +0000 |
| commit | 54309d637ac2cf474793b884b5392f0a6e5390a9 (patch) | |
| tree | 7d7acb4cb7b4e394ba29eef08c553bd34aeb1193 /src/southbridge/intel/i82801gx/i82801gx_pci.c | |
| parent | 977ed2d99565fc35c52f50cbe310b7b211611e94 (diff) | |
| download | coreboot-staging-54309d637ac2cf474793b884b5392f0a6e5390a9.zip coreboot-staging-54309d637ac2cf474793b884b5392f0a6e5390a9.tar.gz | |
Update Kontron board
- use new features of the ich7 update
- move rambase above 1M to avoid memory trashing through SMM relocation
- enable superio HWM
Update ICH7 driver
- minor smi cosmetics (in progress)
- add real ac97 driver
- add real azalia driver
- fix some interrupt issues
- fix some sata issues
- include Patrick's fix for _lpc.c
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3886 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801gx/i82801gx_pci.c')
| -rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx_pci.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx_pci.c b/src/southbridge/intel/i82801gx/i82801gx_pci.c index 98b017c..b2e4ce5 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_pci.c +++ b/src/southbridge/intel/i82801gx/i82801gx_pci.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2008 coresystems GmbH + * Copyright (C) 2008-2009 coresystems GmbH * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -46,6 +46,9 @@ static void pci_init(struct device *dev) reg16 = pci_read_config16(dev, 0x1e); reg16 |= 0xf900; pci_write_config16(dev, 0x1e, reg16); + + /* Will this improve throughput of bus masters? */ + pci_write_config8(dev, PCI_MIN_GNT, 0x06); } static void ich_pci_dev_enable_resources(struct device *dev) |
