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| author | Stefan Reinauer <stepan@coresystems.de> | 2009-08-12 16:08:05 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2009-08-12 16:08:05 +0000 |
| commit | 109ab317e7544c3290700b83240849629d769494 (patch) | |
| tree | 8eee0ef8d269e21ecb2d585c74f35c85982aeeef /src/southbridge/intel/i82801gx/i82801gx_pci.c | |
| parent | fd4519b5ef086fbec60041570c6c9d73d6a80a79 (diff) | |
| download | coreboot-staging-109ab317e7544c3290700b83240849629d769494.zip coreboot-staging-109ab317e7544c3290700b83240849629d769494.tar.gz | |
drop extra whitespace at end of line for i945 + ICH7 (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4538 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801gx/i82801gx_pci.c')
| -rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx_pci.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx_pci.c b/src/southbridge/intel/i82801gx/i82801gx_pci.c index 2e1a251..215563d 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_pci.c +++ b/src/southbridge/intel/i82801gx/i82801gx_pci.c @@ -71,10 +71,10 @@ static void ich_pci_dev_enable_resources(struct device *dev) ops = ops_pci(dev); if (dev->on_mainboard && ops && ops->set_subsystem) { printk_debug("%s subsystem <- %02x/%02x\n", - dev_path(dev), + dev_path(dev), CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID, CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID); - ops->set_subsystem(dev, + ops->set_subsystem(dev, CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID, CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID); } @@ -82,7 +82,7 @@ static void ich_pci_dev_enable_resources(struct device *dev) command = pci_read_config16(dev, PCI_COMMAND); command |= dev->command; #ifdef PCI_BRIDGE_UPDATE_COMMAND - /* If we write to PCI_COMMAND, on some systems + /* If we write to PCI_COMMAND, on some systems * this will cause the ROM and APICs not being visible * anymore. */ |
