summaryrefslogtreecommitdiffstats
path: root/src/southbridge/intel/i82801gx/i82801gx_early_smbus.c
diff options
context:
space:
mode:
authorStefan Reinauer <stepan@coresystems.de>2008-10-29 04:46:52 +0000
committerStefan Reinauer <stepan@openbios.org>2008-10-29 04:46:52 +0000
commitdebb11fc1fe5f5560015ab9905f1ccc2e08c73e0 (patch)
tree9160cd3787a3213a38f5e9b9942360bcaf753f1a /src/southbridge/intel/i82801gx/i82801gx_early_smbus.c
parentb70d1993a432af2a026c4cad0fa3dd3c5eca1ef7 (diff)
downloadcoreboot-staging-debb11fc1fe5f5560015ab9905f1ccc2e08c73e0.zip
coreboot-staging-debb11fc1fe5f5560015ab9905f1ccc2e08c73e0.tar.gz
Support for the Intel ICH7 southbridge.
This includes an early SMI handler. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3701 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801gx/i82801gx_early_smbus.c')
-rw-r--r--src/southbridge/intel/i82801gx/i82801gx_early_smbus.c59
1 files changed, 59 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx_early_smbus.c b/src/southbridge/intel/i82801gx/i82801gx_early_smbus.c
new file mode 100644
index 0000000..5fe1daa
--- /dev/null
+++ b/src/southbridge/intel/i82801gx/i82801gx_early_smbus.c
@@ -0,0 +1,59 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2008 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <device/pci_ids.h>
+#include "i82801gx.h"
+#include "i82801gx_smbus.h"
+
+static void enable_smbus(void)
+{
+ device_t dev;
+
+ /* Set the SMBus device statically. */
+ dev = PCI_DEV(0x0, 0x1f, 0x3);
+
+ /* Check to make sure we've got the right device. */
+ if (pci_read_config16(dev, 0x2) != 0x27da) {
+ die("SMBus controller not found!");
+ }
+
+ /* Set SMBus I/O base. */
+ pci_write_config32(dev, SMB_BASE,
+ SMBUS_IO_BASE | PCI_BASE_ADDRESS_SPACE_IO);
+
+ /* Set SMBus enable. */
+ pci_write_config8(dev, HOSTC, HST_EN);
+
+ /* Set SMBus I/O space enable. */
+ pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_IO);
+
+ /* Disable interrupt generation. */
+ outb(0, SMBUS_IO_BASE + SMBHSTCTL);
+
+ /* Clear any lingering errors, so transactions can run. */
+ outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
+ print_debug("SMBus controller enabled.\r\n");
+}
+
+static inline int smbus_read_byte(unsigned device, unsigned address)
+{
+ return do_smbus_read_byte(device, address);
+}
+
OpenPOWER on IntegriCloud