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| author | Stefan Reinauer <stepan@coresystems.de> | 2010-08-30 17:53:13 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-08-30 17:53:13 +0000 |
| commit | 704b59662d8bf17cac387109a186cc6f702f27f9 (patch) | |
| tree | 12de99d00ac98616d0d4df8b089603649a93b699 /src/pc80 | |
| parent | 849498d4471003ff959e0151828abfe9a7be4621 (diff) | |
| download | coreboot-staging-704b59662d8bf17cac387109a186cc6f702f27f9.zip coreboot-staging-704b59662d8bf17cac387109a186cc6f702f27f9.tar.gz | |
We call this cache as ram everywhere, so let's call it the same in Kconfig
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5756 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/pc80')
| -rw-r--r-- | src/pc80/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/pc80/serial.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/pc80/Makefile.inc b/src/pc80/Makefile.inc index b20f2b4..b7890f5 100644 --- a/src/pc80/Makefile.inc +++ b/src/pc80/Makefile.inc @@ -4,7 +4,7 @@ obj-y += i8259.o obj-$(CONFIG_UDELAY_IO) += udelay_io.o obj-y += keyboard.o initobj-$(CONFIG_USE_OPTION_TABLE) += mc146818rtc_early.o -initobj-$(CONFIG_USE_DCACHE_RAM) += serial.o +initobj-$(CONFIG_CACHE_AS_RAM) += serial.o subdirs-y += vga $(obj)/pc80/mc146818rtc.o : $(OPTION_TABLE_H) diff --git a/src/pc80/serial.c b/src/pc80/serial.c index 449f0ba..4a4ca68 100644 --- a/src/pc80/serial.c +++ b/src/pc80/serial.c @@ -28,7 +28,7 @@ #define UART_LCS CONFIG_TTYS0_LCS -#if CONFIG_USE_DCACHE_RAM == 0 +#if CONFIG_CACHE_AS_RAM == 0 /* Data */ #define UART_RBR 0x00 @@ -97,7 +97,7 @@ void uart_init(void) } #else -/* CONFIG_USE_DCACHE_RAM == 1 */ +/* CONFIG_CACHE_AS_RAM == 1 */ extern void uart8250_init(unsigned base_port, unsigned divisor, unsigned lcs); void uart_init(void) |
