Drop the need for cpu_reset, it's really just a short cut to stage2.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5393 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

9 files changed, 19 insertions, 9 deletions

diff --git a/src/mainboard/dell/s1850/romstage.c b/src/mainboard/dell/s1850/romstage.c
index 17a4113..58e86f9 100644
--- a/src/mainboard/dell/s1850/romstage.c
+++ b/src/mainboard/dell/s1850/romstage.c
@@ -157,6 +157,8 @@ static inline void bmc_foad(void)
 
 /* end IPMI garbage */
 
+#include "arch/i386/lib/stages.c"
+
 static void main(unsigned long bist)
 {
 	u8 b;
@@ -277,7 +279,7 @@ static void main(unsigned long bist)
 		/* Skip this if there was a built in self test failure */
 		early_mtrr_init();
 		if (memory_initialized()) {
-			asm volatile ("jmp __cpu_reset");
+			skip_romstage();
 		}
 	}
 	/* Setup the console */
diff --git a/src/mainboard/intel/jarrell/romstage.c b/src/mainboard/intel/jarrell/romstage.c
index 4255e43..0139f04 100644
--- a/src/mainboard/intel/jarrell/romstage.c
+++ b/src/mainboard/intel/jarrell/romstage.c
@@ -50,6 +50,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "northbridge/intel/e7520/raminit.c"
 #include "lib/generic_sdram.c"
 #include "debug.c"
+#include "arch/i386/lib/stages.c"
 
 static void main(unsigned long bist)
 {
@@ -75,7 +76,7 @@ static void main(unsigned long bist)
 		/* Skip this if there was a built in self test failure */
 		early_mtrr_init();
 		if (memory_initialized()) {
-			asm volatile ("jmp __cpu_reset");
+			skip_romstage();
 		}
 	}
 	/* Setup the console */
diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c
index ed8e647..d5d00a9 100644
--- a/src/mainboard/intel/mtarvon/romstage.c
+++ b/src/mainboard/intel/mtarvon/romstage.c
@@ -58,6 +58,7 @@ static inline int spd_read_byte(u16 device, u8 address)
 #include "northbridge/intel/i3100/raminit.c"
 #include "lib/generic_sdram.c"
 #include "../jarrell/debug.c"
+#include "arch/i386/lib/stages.c"
 
 static void main(unsigned long bist)
 {
@@ -79,7 +80,7 @@ static void main(unsigned long bist)
 		/* Skip this if there was a built in self test failure */
 		early_mtrr_init();
 		if (memory_initialized()) {
-			asm volatile ("jmp __cpu_reset");
+			skip_romstage();
 		}
 	}
 	/* Set up the console */
diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c
index 4163c87..41629ef 100644
--- a/src/mainboard/intel/truxton/romstage.c
+++ b/src/mainboard/intel/truxton/romstage.c
@@ -58,6 +58,7 @@ static inline int spd_read_byte(u16 device, u8 address)
 #include "northbridge/intel/i3100/raminit_ep80579.c"
 #include "lib/generic_sdram.c"
 #include "../../intel/jarrell/debug.c"
+#include "arch/i386/lib/stages.c"
 
 /* #define TRUXTON_DEBUG */
 
@@ -77,7 +78,7 @@ static void main(unsigned long bist)
 		/* Skip this if there was a built in self test failure */
 		early_mtrr_init();
 		if (memory_initialized()) {
-			asm volatile ("jmp __cpu_reset");
+			skip_romstage();
 		}
 	}
 
diff --git a/src/mainboard/supermicro/x6dai_g/romstage.c b/src/mainboard/supermicro/x6dai_g/romstage.c
index 330b7ce..97fb724 100644
--- a/src/mainboard/supermicro/x6dai_g/romstage.c
+++ b/src/mainboard/supermicro/x6dai_g/romstage.c
@@ -51,6 +51,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "northbridge/intel/e7525/raminit.c"
 #include "lib/generic_sdram.c"
+#include "arch/i386/lib/stages.c"
 
 static void main(unsigned long bist)
 {
@@ -74,7 +75,7 @@ static void main(unsigned long bist)
 		/* Skip this if there was a built in self test failure */
 		early_mtrr_init();
 		if (memory_initialized()) {
-			asm volatile ("jmp __cpu_reset");
+			skip_romstage();
 		}
 	}
 	/* Setup the console */
diff --git a/src/mainboard/supermicro/x6dhe_g/romstage.c b/src/mainboard/supermicro/x6dhe_g/romstage.c
index 58168e6..0845f8c 100644
--- a/src/mainboard/supermicro/x6dhe_g/romstage.c
+++ b/src/mainboard/supermicro/x6dhe_g/romstage.c
@@ -52,6 +52,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "northbridge/intel/e7520/raminit.c"
 #include "lib/generic_sdram.c"
+#include "arch/i386/lib/stages.c"
 
 static void main(unsigned long bist)
 {
@@ -77,7 +78,7 @@ static void main(unsigned long bist)
 		/* Skip this if there was a built in self test failure */
 		early_mtrr_init();
 		if (memory_initialized()) {
-			asm volatile ("jmp __cpu_reset");
+			skip_romstage();
 		}
 	}
 	/* Setup the console */
diff --git a/src/mainboard/supermicro/x6dhe_g2/romstage.c b/src/mainboard/supermicro/x6dhe_g2/romstage.c
index 46b1ca5..93df395 100644
--- a/src/mainboard/supermicro/x6dhe_g2/romstage.c
+++ b/src/mainboard/supermicro/x6dhe_g2/romstage.c
@@ -52,6 +52,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "northbridge/intel/e7520/raminit.c"
 #include "lib/generic_sdram.c"
+#include "arch/i386/lib/stages.c"
 
 static void main(unsigned long bist)
 {
@@ -78,7 +79,7 @@ static void main(unsigned long bist)
 		/* Skip this if there was a built in self test failure */
 		early_mtrr_init();
 		if (memory_initialized()) {
-			asm volatile ("jmp __cpu_reset");
+			skip_romstage();
 		}
 	}
 	/* Setup the console */
diff --git a/src/mainboard/supermicro/x6dhr_ig/romstage.c b/src/mainboard/supermicro/x6dhr_ig/romstage.c
index a703d15..b6e77ca 100644
--- a/src/mainboard/supermicro/x6dhr_ig/romstage.c
+++ b/src/mainboard/supermicro/x6dhr_ig/romstage.c
@@ -53,6 +53,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "northbridge/intel/e7520/raminit.c"
 #include "lib/generic_sdram.c"
+#include "arch/i386/lib/stages.c"
 
 static void main(unsigned long bist)
 {
@@ -78,7 +79,7 @@ static void main(unsigned long bist)
 		/* Skip this if there was a built in self test failure */
 		early_mtrr_init();
 		if (memory_initialized()) {
-			asm volatile ("jmp __cpu_reset");
+			skip_romstage();
 		}
 	}
 	/* Setup the console */
diff --git a/src/mainboard/supermicro/x6dhr_ig2/romstage.c b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
index 3b46b31..cf84a4c 100644
--- a/src/mainboard/supermicro/x6dhr_ig2/romstage.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
@@ -53,6 +53,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "northbridge/intel/e7520/raminit.c"
 #include "lib/generic_sdram.c"
+#include "arch/i386/lib/stages.c"
 
 static void main(unsigned long bist)
 {
@@ -78,7 +79,7 @@ static void main(unsigned long bist)
 		/* Skip this if there was a built in self test failure */
 		early_mtrr_init();
 		if (memory_initialized()) {
-			asm volatile ("jmp __cpu_reset");
+			skip_romstage();
 		}
 	}
 	/* Setup the console */