intel/gma: consolidate vbt code

Change-Id: I80b7facfb9cc9f642dd1c766884dc23da1aab2c8
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6800
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

8 files changed, 27 insertions, 26 deletions

diff --git a/src/mainboard/google/link/i915.c b/src/mainboard/google/link/i915.c
index c24c4bd..383c891 100644
--- a/src/mainboard/google/link/i915.c
+++ b/src/mainboard/google/link/i915.c
@@ -236,8 +236,8 @@ static int run(int index)
 	return i+1;
 }
 
-int i915lightup(const struct northbridge_intel_sandybridge_config *info,
-		u32 pphysbase, u16 piobase, u32 pmmio, u32 pgfx)
+int i915lightup_sandy(const struct i915_gpu_controller_info *info,
+		      u32 pphysbase, u16 piobase, u32 pmmio, u32 pgfx)
 {
 	static struct edid edid;
 	int edid_ok;
diff --git a/src/mainboard/google/link/i915io.c b/src/mainboard/google/link/i915io.c
index 4bf0e6f..b66771a 100644
--- a/src/mainboard/google/link/i915io.c
+++ b/src/mainboard/google/link/i915io.c
@@ -18,6 +18,7 @@
  */
 
 #include <stdint.h>
+#include <stdlib.h>
 #include "i915io.h"
 
 struct iodef iodefs[] = {
diff --git a/src/mainboard/lenovo/t530/devicetree.cb b/src/mainboard/lenovo/t530/devicetree.cb
index ec9041d..b44623b 100644
--- a/src/mainboard/lenovo/t530/devicetree.cb
+++ b/src/mainboard/lenovo/t530/devicetree.cb
@@ -10,10 +10,10 @@ chip northbridge/intel/sandybridge
 	register "gpu_panel_power_down_delay" = "100"		# T5+T6: 10ms
 	register "gpu_panel_power_backlight_on_delay" = "2000"	# T3: 200ms
 	register "gpu_panel_power_backlight_off_delay" = "2000"	# T4: 200ms
-	register "gpu_use_spread_spectrum_clock" = "1"
-	register "gpu_lvds_dual_channel" = "1"
-	register "gpu_link_frequency_270_mhz" = "1"
-	register "gpu_lvds_num_lanes" = "1"
+	register "gfx.use_spread_spectrum_clock" = "1"
+	register "gfx.lvds_dual_channel" = "1"
+	register "gfx.link_frequency_270_mhz" = "1"
+	register "gfx.lvds_num_lanes" = "1"
 	register "gpu_cpu_backlight" = "0x1155"
 	register "gpu_pch_backlight" = "0x11551155"
 
diff --git a/src/mainboard/lenovo/x200/devicetree.cb b/src/mainboard/lenovo/x200/devicetree.cb
index 285e30f..376273a 100644
--- a/src/mainboard/lenovo/x200/devicetree.cb
+++ b/src/mainboard/lenovo/x200/devicetree.cb
@@ -1,9 +1,9 @@
 chip northbridge/intel/gm45
 
-	register "gpu_use_spread_spectrum_clock" = "1"
-	register "gpu_lvds_dual_channel" = "0"
-	register "gpu_link_frequency_270_mhz" = "1"
-	register "gpu_lvds_num_lanes" = "4"
+	register "gfx.use_spread_spectrum_clock" = "1"
+	register "gfx.lvds_dual_channel" = "0"
+	register "gfx.link_frequency_270_mhz" = "1"
+	register "gfx.lvds_num_lanes" = "4"
 
 	device cpu_cluster 0 on
 		chip cpu/intel/socket_BGA956
diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb
index 21e328a..7592cb0 100644
--- a/src/mainboard/lenovo/x201/devicetree.cb
+++ b/src/mainboard/lenovo/x201/devicetree.cb
@@ -35,10 +35,10 @@ chip northbridge/intel/nehalem
 	register "gpu_panel_power_backlight_off_delay" = "2500"
 	register "gpu_cpu_backlight" = "0x58d"
 	register "gpu_pch_backlight" = "0x061a061a"
-	register "gpu_use_spread_spectrum_clock" = "1"
-	register "gpu_lvds_dual_channel" = "0"
-	register "gpu_link_frequency_270_mhz" = "1"
-	register "gpu_lvds_num_lanes" = "4"
+	register "gfx.use_spread_spectrum_clock" = "1"
+	register "gfx.lvds_dual_channel" = "0"
+	register "gfx.link_frequency_270_mhz" = "1"
+	register "gfx.lvds_num_lanes" = "4"
 
 	chip ec/lenovo/pmh7
 		device pnp ff.1 on # dummy
diff --git a/src/mainboard/lenovo/x220/devicetree.cb b/src/mainboard/lenovo/x220/devicetree.cb
index 96bed1e..dc129c0 100644
--- a/src/mainboard/lenovo/x220/devicetree.cb
+++ b/src/mainboard/lenovo/x220/devicetree.cb
@@ -10,10 +10,10 @@ chip northbridge/intel/sandybridge
 	register "gpu_panel_power_down_delay" = "300"		# T5+T6: 30ms
 	register "gpu_panel_power_backlight_on_delay" = "2000"	# T3: 200ms
 	register "gpu_panel_power_backlight_off_delay" = "2000"	# T4: 200ms
-	register "gpu_use_spread_spectrum_clock" = "1"
-	register "gpu_lvds_dual_channel" = "0"
-	register "gpu_link_frequency_270_mhz" = "1"
-	register "gpu_lvds_num_lanes" = "4"
+	register "gfx.use_spread_spectrum_clock" = "1"
+	register "gfx.lvds_dual_channel" = "0"
+	register "gfx.link_frequency_270_mhz" = "1"
+	register "gfx.lvds_num_lanes" = "4"
 	register "gpu_cpu_backlight" = "0x1155"
 	register "gpu_pch_backlight" = "0x06100610"
 
diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb
index 9dc559c..1886ba9 100644
--- a/src/mainboard/lenovo/x230/devicetree.cb
+++ b/src/mainboard/lenovo/x230/devicetree.cb
@@ -10,10 +10,10 @@ chip northbridge/intel/sandybridge
 	register "gpu_panel_power_down_delay" = "100"		# T5+T6: 10ms
 	register "gpu_panel_power_backlight_on_delay" = "2100"	# T3: 210ms
 	register "gpu_panel_power_backlight_off_delay" = "2100"	# T4: 210ms
-	register "gpu_use_spread_spectrum_clock" = "1"
-	register "gpu_lvds_dual_channel" = "0"
-	register "gpu_link_frequency_270_mhz" = "1"
-	register "gpu_lvds_num_lanes" = "1"
+	register "gfx.use_spread_spectrum_clock" = "1"
+	register "gfx.lvds_dual_channel" = "0"
+	register "gfx.link_frequency_270_mhz" = "1"
+	register "gfx.lvds_num_lanes" = "1"
 	register "gpu_cpu_backlight" = "0x1155"
 	register "gpu_pch_backlight" = "0x11551155"
 
diff --git a/src/mainboard/packardbell/ms2290/devicetree.cb b/src/mainboard/packardbell/ms2290/devicetree.cb
index a57a2c1..19f6c9c 100644
--- a/src/mainboard/packardbell/ms2290/devicetree.cb
+++ b/src/mainboard/packardbell/ms2290/devicetree.cb
@@ -35,10 +35,10 @@ chip northbridge/intel/nehalem
 	register "gpu_panel_power_backlight_off_delay" = "3000"
 	register "gpu_cpu_backlight" = "0x58d"
 	register "gpu_pch_backlight" = "0x061a061a"
-	register "gpu_use_spread_spectrum_clock" = "0"
-	register "gpu_lvds_dual_channel" = "1"
-	register "gpu_link_frequency_270_mhz" = "1"
-	register "gpu_lvds_num_lanes" = "4"
+	register "gfx.use_spread_spectrum_clock" = "0"
+	register "gfx.lvds_dual_channel" = "1"
+	register "gfx.link_frequency_270_mhz" = "1"
+	register "gfx.lvds_num_lanes" = "4"
 
 	device cpu_cluster 0 on
 		chip cpu/intel/model_2065x