summaryrefslogtreecommitdiffstats
path: root/src/mainboard
diff options
context:
space:
mode:
authorRonald G. Minnich <rminnich@gmail.com>2007-11-01 15:15:14 +0000
committerRonald G. Minnich <rminnich@gmail.com>2007-11-01 15:15:14 +0000
commit9d5c3a8ea4536b470b644531814e019394c4563a (patch)
treed15fd39ba33c3670ed4ccc68f7ba682e1573be49 /src/mainboard
parenta0181ea03605b1fafe2ec9882384b91655dfe1c2 (diff)
downloadcoreboot-staging-9d5c3a8ea4536b470b644531814e019394c4563a.zip
coreboot-staging-9d5c3a8ea4536b470b644531814e019394c4563a.tar.gz
This patch is a trivial response to a good comment from Uwe, so I am
self-acking before it gets lost. Acked-by: Ronald G. Minnich <rminnich@gmail.com> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2924 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/pcengines/alix1c/cache_as_ram_auto.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/pcengines/alix1c/cache_as_ram_auto.c b/src/mainboard/pcengines/alix1c/cache_as_ram_auto.c
index 087502f..4142eaf 100644
--- a/src/mainboard/pcengines/alix1c/cache_as_ram_auto.c
+++ b/src/mainboard/pcengines/alix1c/cache_as_ram_auto.c
@@ -86,7 +86,7 @@ static u8 spdbytes[] = {
[SPD_tRRD] = 10,
};
-static u8 spd_read_byte(unsigned device, unsigned address)
+static u8 spd_read_byte(u8 device, u8 address)
{
print_debug("spd_read_byte dev ");
print_debug_hex8(device);
OpenPOWER on IntegriCloud